Nassda Corporation (NSDA) - 500 Beiträge pro Seite

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Profile:Nassda Corporation is a provider of full-chip circuit simulation and analysis software for the design and verification of complex nanometer-scale semiconductors. The Company`s initial product, HSIM, is a hierarchical simulator that meets the circuit verification challenges of integrated circuit designs. HSIM provides a number of key benefits to the Company`s customers, including an improved ability to achieve first silicon success, reduced chip production costs, accelerated time-to-market through shortened design cycles and enhanced chip performance. The Company`s software has been licensed by over 100 organizations worldwide. End users of the Company`s products include major semiconductor and electronic product manufacturers such as AMD, Broadcom, Fujitsu, Infineon, Matsushita, Micron, Mitsubishi, Samsung, STMicroelectronics and Toshiba.
http://www.nassda.com

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Tuesday July 16, 4:31 pm Eastern Time
Reuters Company News
Nassda reports higher Q3 sales, profit

SANTA CLARA, Calif., July 16 (Reuters) - Nassda Corp (NasdaqNM:NSDA - News), which makes chip circuit verification software, Tuesday reported higher third-quarter sales and earnings, and said adoption of its new and existing products remained strong.

The company said it earned $1.8 million, or 6 cents per share in the quarter, compared with $758,000 or 3 cents per share the year before. It said revenue rose to $8.9 million from $6.1 million.

The company said it expects the electronic and semiconductor environment to remain challenging going forward, and continued strong demand for its products as the industry continued to move toward smaller products.

Nassda said it expects to report fiscal fourth-quarter revenue of between $9.8 million and $9.9 million and pro forma diluted earnings per share of about eight cents.

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mindestens Halbierung des Kurswerts vom 02.08.02

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Nassda`s HSIM Tool Adopted by Agere Systems
HSIM Hierarchical Full-Chip Circuit Simulator Replaces Existing Tools in Agere Systems ASIC Design Flow
Tuesday September 3, 4:16 pm ET


SANTA CLARA, Calif.--(BUSINESS WIRE)--Sept. 3, 2002--Nassda(TM) Corporation (Nasdaq:NSDA - News) today announced that Agere Systems (NYSE:AGR.A - News, AGR.B - News) is using Nassda`s HSIM(TM) hierarchical full-chip simulator and analysis tool for advanced timing analysis of clock trees and memory characterization in its application specific integrated circuit (ASIC) solutions.
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Under a multi-license agreement, Agere has acquired HSIM to replace existing circuit-simulation tools. For ASIC silicon success at Agere, detailed clock-tree analysis and characterization of advanced memories are essential.

"The power of HSIM, combined with Agere`s strong clock analysis capabilities, allow Agere to provide its customers a Spice quality analysis of the clock network while staying within the standard ASIC design flow," said Don Friedberg, director of design methodologies with Agere. "In our evaluations, HSIM proved its ability to handle our largest ASIC designs and provide the high performance, capacity and accuracy we need to address both current and emerging needs and deliver our ASIC solutions to our customers faster."

"Agere`s design flow increasingly relies on the use of post-layout data in simulation and analysis," added Friedberg. "For these kinds of simulations, HSIM has the efficiency and ease-of-use we require."

"For companies such as Agere that possess leading-edge ASIC communications IP capabilities, design teams are looking to solve the challenge of nanometer verification for ICs with greater circuit size and complexity," said Sang Wang, CEO of Nassda. "We`re pleased to be working with Agere to deliver HSIM with the high levels of performance, capacity and accuracy that they need to fully verify their innovative designs."

About HSIM

HSIM provides detailed circuit-level analysis of timing and power behavior and signal integrity effects. It solves the critical issue of analyzing circuit behavior while taking into account the electrical and parasitic effects of nanometer-scale silicon. It is ideal for demanding analog, memory, mixed-signal and system-on-chip designs.

About Agere Systems

Agere Systems is a premier provider of advanced integrated circuit (IC) solutions that access, move and store network information. Agere`s IC solutions form the building blocks for a broad range of communications and computing applications. The company is the leader in providing storage solutions for hard disk drives with its read-channel chips, preamplifiers and system-on-a-chip solutions, and the No. 2 provider of Wi-Fi solutions for wireless LAN applications. For network equipment providers, Agere is a leading supplier of ICs for wired communications, network switching and access, and ATM and SONET/SDH solutions. In addition, Agere is the No. 2 supplier of application-specific ICs (ASICs) for communications applications. More information about Agere Systems is available from its Web site at http://www.agere.com.

About Nassda

Nassda Corporation (Nasdaq:NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, and mixed-signal SoC designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

The specific features, functionality, and release timing of any new products described in this press release remain at the sole discretion of Nassda Corporation and Nassda does not make any warranty as to when or if such specific features, functionality or release may occur.

Note to Editors: Nassda and HSIM are registered trademarks of Nassda Corporation. All other trademarks and registered trademarks are the property of their owners.



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Contact:
Nassda Corporation
Graham Bell, 408/562-9168
[e-mail]
or
Lee Public Relations
Ed Lee, 650/363-0142
[e-mail]



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Source: Nassda Corporation

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8:34AM Nassda upgraded at UBS (NSDA) 6.65: UBS Warburg upgrades to BUY from Hold based on more rational expectations and more attractive relative valuation; price target is $11.

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Nassda Announces Record Operating Results for the Quarter Ended September 30, 2002
Tuesday October 22, 4:03 pm ET
Revenue of $9.9 Million, Net Income of $2.2 Million, or $0.08 Per Diluted Share


SANTA CLARA, Calif.--(BUSINESS WIRE)--Oct. 22, 2002--Nassda Corporation (Nasdaq:NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced financial results for the quarter ended September 30, 2002, the fourth quarter of Nassda`s fiscal 2002. Revenue for the quarter ended September 30, 2002 was $9.9 million, a 49% increase from $6.6 million for the quarter ended September 30, 2001 and an 11% increase from $8.9 million for the quarter ended June 30, 2002.
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Net income for the quarter ended September 30, 2002 was $2.2 million, or $0.08 per diluted share, up from $120,000, or $0.01 per diluted share, for the quarter ended September 30, 2001 and up 18% from $1.8 million, or $0.06 per diluted share, for the quarter ended June 30, 2002.

Excluding stock-based compensation expense, pro forma net income was $2.3 million, or $0.08 per diluted share, for the quarter ended September 30, 2002, up 124% from $1.0 million, or $0.05 per diluted share, for the quarter ended September 30, 2001, and up 12% from $2.1 million, or $0.07 per diluted share, for the quarter ended June 30, 2002.

Fiscal 2002 Results

Total revenue for fiscal 2002 was a record $33.9 million, a 55% increase from $21.9 million for fiscal 2001 and net income for fiscal 2002 was $6.4 million, or $0.23 per diluted share, up 206% from $2.1 million, or $0.10 per diluted share for fiscal 2001. Excluding stock-based compensation, pro forma net income for 2002 was $7.3 million, or $0.26 per diluted share, up 96% from $3.7 million, or $0.17 per diluted share, for fiscal 2001.

"I am very pleased with our accomplishments in fiscal 2002. We have achieved our 12th consecutive quarter of revenue growth and maintained our operating margin of 32% for the quarter, excluding stock-based compensation, despite the prolonged weakness in the semiconductor industry. We are also very proud that we were recently recognized as a Rising Star by the Deloitte & Touche Technology Fast 500, a ranking of the fastest growing technology companies in North America," said Sang Wang, Chief Executive Officer of Nassda. "Over the course of the fiscal year, we expanded our customer base and further penetrated our major customers at leading design and semiconductor companies."

"In the past three years, Nassda has focused on providing full-chip simulation and analysis which is a big challenge for our customers," added Wang. "As we look forward, we intend to continue to invest and develop leading-edge tools for our customers. I must give many thanks and the recognition that all of our talented and dedicated employees deserve as they have devoted themselves to the success of Nassda and I believe they will continue to deliver the support and innovation needed for our future growth."

Business Outlook

Going forward, Nassda expects the global economic climate for the electronics and semiconductor industry to remain challenging despite the transition from 0.18 micron to smaller silicon geometries of 0.13 micron and 0.09 micron (90 nanometers). Nassda believes this shift to ever-smaller nanometer geometries is continuing, and that the requirement for full-chip transistor-level circuit simulation is becoming ever more critical. As a result, Nassda expects revenue of $10.6 million to $10.7 million, fully diluted earnings per share of approximately $0.07 and pro forma diluted earnings per share of approximately $0.08 for the quarter ending December 31, 2002, which is the first quarter of Nassda`s fiscal 2003.

For fiscal 2003, Nassda anticipates total revenue of $45 million to $47 million, fully diluted earnings per share of approximately $0.31 to $0.33 and pro forma diluted earnings per share of approximately $0.34 to $0.36. Nassda expects sequential quarterly growth in total revenue. Due to the expected continued penetration into major accounts and customers demanding more flexibility, Nassda expects time based license order bookings as a percent of total bookings to increase to between 40% to 50%. As a result, time based license revenue as a percent of total revenue is expected to increase to between 35% to 40%.

Nassda expects to continue to control operating costs, but also anticipates making continued investments in Nassda`s worldwide distribution channels and research and development organization. As a result, Nassda expects quarterly operating margins of 30% to 32% during fiscal 2003.

Nassda will hold a conference call that includes business outlook, with financial analysts and investors at 2:00 p.m. PDT today. A live webcast of the call will be available on Nassda`s Web site at http://www.nassda.com or http://www.companyboardroom.com. Following completion of the call, a rebroadcast of the webcast will be available at http://www.nassda.com or http://www.companyboardroom.com through October 29, 2002.

Those without internet access may listen to a replay of the call by dialing [phone], access code 542348. The replay will be available from 5:00 p.m. PDT on October 22, 2002 through October 29, 2002.

About Nassda

Nassda Corporation (Nasdaq:NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

Forward Looking Statements

This press release contains forward-looking statements regarding the visibility of future revenue, revenue growth, operating margin, operating expenses and pro forma and diluted earnings per share that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words that imply a future state, such as "expects" or "anticipates," or that imply that a particular future event or events will occur, such as "will," "remain," "may," or the negative of these terms. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation, future performance is dependent on: Nassda`s product development schedules, the design performance of Nassda`s existing and new electronic design automation software and other tools, as well as customer`s adoption of Nassda`s products and those customer`s design and manufacturing schedules. In addition, reduced capital spending or delayed implementation of programs due to adverse general economic conditions and reduced demand for products containing complex nanometer-scale semiconductors may impact Nassda`s future performance. These risks, uncertainties and other factors may cause Nassda`s actual results, levels of activity, performance or achievements to differ materially from those expressed or implied by the forward-looking statements.

Forward-looking statements are only predictions and the actual events or results may differ materially. Nassda cannot provide any assurance that its future results will meet expectations. In addition, historical information should not be considered a predictor of future performance. Neither Nassda nor any other person assumes responsibility for the accuracy and completeness of these forward-looking statements. Nassda disclaims any obligation to update information contained in any forward-looking statement.

For additional information and considerations regarding the risks faced by Nassda, see its Registration Statement on Form S-1, as filed with the Securities and Exchange Commission, as well as its periodic reports on Forms 10-Q as filed with the Securities and Exchange Commission.

Note to Editors: Nassda and HSIM are registered trademarks of Nassda Corporation.

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Nassda Corporation
Condensed Consolidated Income Statements
(in thousands, except per share data)

Three Months Ended Twelve Months Ended
September 30, September 30,
2002 2001 2002 2001
(Unaudited)
Revenue:
Product $ 5,181 $ 4,153 $ 19,101 $ 15,152
Subscription 2,925 1,475 9,587 4,009
Maintenance 1,766 1,017 5,219 2,782
---------- ---------- ---------- ----------
Total revenue 9,872 6,645 33,907 21,943
---------- ---------- ---------- ----------
Cost of revenue:
Cost of product
revenue 102 107 259 308
Cost of
subscription
revenue 85 35 276 121
Cost of maintenance
revenue 198 119 685 412
---------- ---------- ---------- ----------
Total cost of
revenue 385 261 1,220 841
---------- ---------- ---------- ----------

Gross profit 9,487 6,384 32,687 21,102
---------- ---------- ---------- ----------

Operating expenses:
Research and
development 1,645 1,467 5,478 5,107
Sales and marketing 2,554 1,788 9,388 7,140
General and
administrative 2,166 1,614 7,773 3,355
Stock-based
compensation 249 1,448 1,005 2,369
---------- ---------- ---------- ----------
Total operating
expenses 6,614 6,317 23,644 17,971
---------- ---------- ---------- ----------
Income from
operations 2,873 67 9,043 3,131
Interest Income 294 132 949 415
Other income
(expense), net (3) 5 (9) (1)
---------- ---------- ---------- ----------
Income before
income taxes 3,164 204 9,983 3,545
Provision for
income taxes (1,002) (84) (3,579) (1,454)
---------- ---------- ---------- ----------
Net income $ 2,162 $ 120 $ 6,404 $ 2,091
========== ========== ========== ==========
Earnings per share:
Basic $ 0.09 $ 0.01 $ 0.32 $ 0.28
Diluted $ 0.08 $ 0.01 $ 0.23 $ 0.10
Pro forma $ 0.08 $ 0.05 $ 0.26 $ 0.17

Shares used in
computing earning
per share:
Basic 23,699 8,725 20,166 7,461
Diluted 28,495 22,607 27,697 21,616
Pro forma 28,756 23,045 27,924 22,148

Net income $ 2,162 $ 120 $ 6,404 $ 2,091
Stock-based
compensation 249 1,448 1,005 2,369
Tax Impact on
stock-based
compensation (88) (530) (88) (730)
---------- ---------- ---------- ----------
Pro forma net
income $ 2,323 $ 1,038 $ 7,321 $ 3,730
---------- ---------- ---------- ----------


Nassda Corporation
Condensed Consolidated Balance Sheets
(in thousands)

September 30, September 30,
2002 2001
ASSETS

Current assets:
Cash, cash equivalents and
short-term investments $ 78,452 $ 12,175
Accounts receivable, net of allowance 4,156 1,766
Prepaid expenses and other
current assets 553 755
Deferred income taxes 2,050 1,809
--------- ---------
Total current assets 85,211 16,505
Property and equipment, net 784 891
Other assets 727 1,453
--------- ---------
Total assets $ 86,722 $ 18,849
========= =========

LIABILITIES AND STOCKHOLDERS` EQUITY

Current liabilities:
Accounts payable $ 555 $ 111
Accrued compensation 4,130 3,089
Accrued liabilities 1,982 935
Income taxes payable 882 1,346
Deferred revenue 6,065 4,472
--------- ---------
Total current liabilities 13,614 9,953
Long-term liabilities 54 1,709
--------- ---------
Total liabilities 13,668 11,662
--------- ---------
Stockholders` equity:
Common stock 25 19
Additional paid-in capital 66,378 8,137
Deferred stock-based compensation (2,208) (3,429)
Accumulated other comprehensive income 6 11
Retained earnings 8,853 2,449
--------- ---------
Total stockholders` equity 73,054 7,187
--------- ---------
Total liabilities and
stockholders` equity $ 86,722 $ 18,849
========= =========




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Contact:
Nassda
Tammy Liu, 408/327-7710
[e-mail]
[e-mail]



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Source: Nassda

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Nassda Announces Stock Repurchase Program of Up to $5 Million of Its Common Stock Over Next 12 Months
Tuesday October 22, 4:04 pm ET


SANTA CLARA, Calif.--(BUSINESS WIRE)--Oct. 22, 2002--Nassda, Inc. (Nasdaq:NSDA - News) a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced its board of directors has authorized a stock repurchase program of up to $5 million of its common stock over the next 12 months. Shares will be repurchased in the open market at times and prices considered appropriate by Nassda. The program is effective immediately.
"This repurchase program reflects the confidence our Board of Directors and management have in our industry and in Nassda," said Sang Wang, Chief Executive Officer of Nassda. "Our strong balance sheet allows us to implement this program, which we believe is in the best interests of our stockholders."

The timing of purchases and the exact number of shares to be purchased will depend on market conditions. As of September 30, 2002, Nassda has approximately 24.9 million shares of common stock outstanding.

About Nassda

Nassda Corporation (Nasdaq:NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

Forward Looking Statements

This press release contains forward-looking statements, including statements regarding the stock repurchase program, that are subject to certain risks and uncertainties, including, but not limited to, those associated with unpredictability and volatility of the price of Nassda`s common stock and the securities of other companies in Nassda`s industry, the performance of and conditions in the United States and world financial markets, the policies and actions of the United States and other governments, and the general political, economic and business conditions in the United States and elsewhere, as well as the "Risk Factors" set forth in Nassda`s Registration Statement on Form S-1 and Nassda`s other filings with the Securities and Exchange Commission. Actual results could differ materially, as a result of such factors, from those set forth in the forward-looking statements.

Forward-looking statements are only predictions and the actual events or results may differ materially. Nassda cannot provide any assurance that its future results will meet expectations. In addition, historical information should not be considered a predictor of future performance. Neither Nassda nor any other person assumes responsibility for the accuracy and completeness of these forward-looking statements. Nassda disclaims any obligation to update information contained in any forward-looking statement.

Note to Editors: Nassda and HSIM are registered trademarks of Nassda Corporation.



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Contact:
Nassda Corporation
Tammy Liu, 408/327-7710
[e-mail]
[e-mail]



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Source: Nassda Corporation

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Nassda`s HSIM Anchors SoC Verification Flow for Insyte
Tuesday October 29, 4:05 pm ET
HSIM Hierarchical Simulator Provides Required Accuracy and Performance for Verification of Insyte SoC, Memory and Analog Circuits


SANTA CLARA, Calif.--(BUSINESS WIRE)--Oct. 29, 2002-- Nassda(TM) Corporation (Nasdaq:NSDA - News) today announced that Innovative Systems & Technology Corporation (Insyte) is using Nassda`s HSIM(TM) hierarchical full-chip simulator and analysis tool for verification of system-on-chip (SoC) integration, custom memories and analog circuits in CMOS and BiCMOS technologies.
After HSIM demonstrated superior accuracy and solved performance problems of other tools, Insyte purchased multiple HSIM licenses. Insyte has integrated HSIM into its full-custom design flow, and Insyte`s engineers now rely on HSIM for verification of customized embedded SRAMs and analog circuits. HSIM also anchors Insyte`s SoC verification flow, where it provides a significant advantage for integration of intellectual property (IP) cores in SoC designs, according to the company.

"We believe there is a strategic advantage in using a full-chip transistor-level simulator for verification in an SoC flow," said Parker Robinson, Vice-President Engineering at Insyte. "HSIM allows us to run test suites validating that all of the IP in a design actually functions together as it should. We think HSIM is not just a better simulator but is in fact a strategic asset. It enables our designers to try approaches they otherwise could not do, and allows them to do more engineering work in the same time frame."

"As design complexity continues to increase, product quality and on-time delivery still need to be maintained," said Sang Wang, CEO of Nassda. "As shown by leading design companies like Insyte, HSIM`s unique combination of accuracy, capacity and speed offers a strategic advantage in the design of high-quality, innovative ICs. We are pleased to be supporting their design success."

About HSIM

HSIM provides detailed circuit-level analysis of timing and power behavior and signal integrity effects. It solves the critical issue of analyzing circuit behavior while taking into account the electrical and parasitic effects of nanometer-scale silicon. It is ideal for demanding analog, memory, mixed-signal and system-on-chip designs.

About Insyte

Innovative systems and technologies corporation (Insyte) is an integrated circuit design services company specializing in mixed-signal systems integration in advanced Silicon Germanium, CMOS, and SOI processes. Insyte offers complete digital and analog design services for SOC integration and works with partner companies to develop mixed-signal standard platforms. Headquartered in Saint Petersburg, Florida, Insyte is a privately held company. For more information, please contact Mr. James Emerick, President and CEO at 727/347-4200.

About Nassda

Nassda Corporation (Nasdaq:NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, and mixed-signal SoC designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

The specific features, functionality, and release timing of any new products described in this press release remain at the sole discretion of Nassda Corporation and Nassda does not make any warranty as to when or if such specific features, functionality or release may occur.

Note to Editors: Nassda and HSIM are registered trademarks of Nassda Corporation. All other trademarks and registered trademarks are the property of their owners.



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Contact:
Nassda Corporation, Santa Clara
Graham Bell, 408/562-9168
[e-mail]
or
Lee Public Relations
Gloria Nichols, 650/363-0142
[e-mail]



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Source: Nassda Corporation

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Nassda`s Verification and Analysis Software Adopted by National Semiconductor
Wednesday December 4, 8:59 am ET
HSIM Hierarchical Full-Chip Circuit Simulator Becomes New Standard and Replaces Existing Tools


SANTA CLARA, Calif.--(BUSINESS WIRE)--Dec. 4, 2002--Nassda Corporation (Nasdaq:NSDA - News) today announced that National Semiconductor has adopted Nassda`s HSIM(TM) hierarchical full-chip simulator and analysis tool for the design and verification of complex integrated circuits (ICs).
National Semiconductor is a worldwide leader for the design and manufacture of analog and mixed-signal ICs. Under a multi-year agreement, National has acquired HSIM and is deploying these licenses worldwide in design centers on three continents. Nassda`s HSIM has become the standard high-speed, high-capacity circuit simulator for National.

"We have had good experience with Nassda as a software supplier," said James Lin, Vice-President of Technology Infrastructure Group at National. "Nassda`s verification technology is making a significant impact on our ability to deliver better designs to our customers in shorter time. With Nassda`s powerful software, technology innovation, and strong support of National, they have made a major contribution to our success. We look forward to our continuing partnership with Nassda to maintain and extend our leadership."

Alvin Ling, Director of Central CAD & License Management said: "Nassda`s HSIM demonstrated its ability to deliver a breakthrough in speed, accuracy and capacity on our complex designs. Being able to perform extensive simulation and analysis before tapeout allows us to produce better parts more quickly for this demanding marketplace. Nassda`s support of our efforts has been world class and has made our job easier."

"National, a world leader in analog and mixed-signal electronics, requires efficient and accurate simulation technology to maintain its market dominating position," said Sang Wang, CEO of Nassda. "We have worked closely with National to ensure that as part of their design flow HSIM provided the integration, speed and accuracy necessary for their leading edge designs. We`re extremely pleased that National chose HSIM as its high-speed high-capacity circuit simulator and their confidence in Nassda."

About HSIM

HSIM provides detailed circuit-level analysis of timing and power behavior and signal integrity effects. It solves the critical issue of analyzing circuit behavior while taking into account the electrical and parasitic effects of nanometer-scale silicon. It is ideal for demanding analog, memory, mixed-signal and system-on-chip designs.

About Nassda

Nassda Corporation (Nasdaq: NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, and mixed-signal SoC designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at www.nassda.com.

The specific features, functionality, and release timing of any new products described in this press release remain at the sole discretion of Nassda Corporation and Nassda does not make any warranty as to when or if such specific features, functionality or release may occur.

Nassda and HSIM are registered trademarks of Nassda Corporation. All other trademarks and registered trademarks are the property of their owners.



--------------------------------------------------------------------------------
Contact:
Nassda Corporation
Graham Bell, 408/562-9168
[e-mail]
or
Lee Public Relations
Gloria Nichols, 650/363-0142
[e-mail]



--------------------------------------------------------------------------------
Source: Nassda Corporation

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Nassda Announces Full-Chip Critical Timing Analyzer for Cell-Based Designs
Monday December 9, 5:52 pm ET
New Tool Speeds Timing Sign-Off for High-Performance Nanometer Digital ICs


SANTA CLARA, Calif.--(BUSINESS WIRE)--Dec. 9, 2002--Nassda Corporation (Nasdaq:NSDA - News) today announced CRITIC(TM), a full-chip critical timing simulator designed for rapid post-layout analysis of cell-based digital integrated circuits (ICs), including their associated clock networks. CRITIC complements traditional static timing analysis verification methods with fast, accurate analysis of timing performance of circuits targeted for nanometer process technologies at 130nm and below.
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We believe CRITIC is the first electronic design automation (EDA) tool able to automatically provide accurate analysis of nanometer effects on critical signal paths and clock networks for complex, high-performance digital ICs, comprising millions of gates and developed with customer-owned tooling (COT) flows. The new tool fills the gap between conventional gate-level sign-off methods and the increasing requirements for more accurate post-layout timing analysis needed to ensure successful first silicon.

"Today, more and more design teams are using COT flows to take their designs from RTL-to-GDSII to get the best performance for their chips. They claim that static timing analysis tools cannot deliver accurate numbers for designs in 130nm processes and for clock rates beyond 300Mhz," said Simon Young, product line director at Nassda. "Built on our market leading HSIM simulation technology, we believe CRITIC provides the unique combination of speed, capacity and accuracy needed to determine the impact of nanometer effects on timing in critical path and clock nets for the full-chip. With its transistor-level analysis, CRITIC allows designers to find and correct critical timing problems prior to manufacture rather than waiting for first silicon, to see if the design had any hidden timing flaws due to nanometer effects."

Importance of accurate timing analysis

"Nanometer effects in the digital realm mean that verification can no longer be limited to gate-level analysis," said An-Chang Deng, Nassda`s president and chief operating officer. "Accordingly, Nassda is taking its leading transistor-level verification technology, and applying it to fill this much needed gap for accurate timing analysis in the cell-based digital IC realm."

CRITIC provides the detailed analysis needed to help ensure timing sign-off. Timing sign-off is the point in the development of digital IC when timing performance of all of the signal paths meets the original design specification. According to a recent study of chip design by CMP United Media, 79% of respondents identified timing as a very critical issue facing engineers when designing larger chips. This result reflects the growing ineffectiveness of current methods to provide accurate timing numbers for nanometer circuits.

Currently design teams rely on static timing analysis to ensure that timing closure has been achieved. Static timing analysis relies on the abstracted behavior of individual gates or cells to perform its timing calculation. With the latest nanometer silicon processes, however, the gate-level abstraction lacks the detail needed to resolve nanometer effects, which lie at the transistor level. Furthermore, the use of static gate-level cell models neglects critical timing issues such as changes in cell delay due to different operating characteristics. Transistor-level effects such as slew degradation, non-linear loading, and coupling between adjacent interconnects can only be correctly analyzed by a transistor-level simulation engine -- using interconnect parasitics for the critical paths and clock networks -- and dynamic values for voltages and currents rather than the ones and zeroes of traditional gate-level analysis. Although transistor-level tools such as SPICE and its fast-SPICE variants have been around for years, these traditional tools lack the performance and capacity to deal with large post-layout designs comprising hundreds of thousand of critical nets with clock networks that can exceed 100,000 transistors -- all compounded by parasitic elements that can easily number in the millions. In contrast, CRITIC provides the features needed to address growing challenges to accurate timing analysis in nanometer circuits.

CRITIC features

CRITIC provides automatic transistor-level post-layout analysis of signal nets and clock nets with minimal designer intervention. For analysis of the system clock, CRITIC identifies and traces the clock net automatically, back-annotates the clock net with interconnect RC parasitics, and sets control signals to sensitize the clock paths. CRITIC then simulates the clock nets with the SPICE model for each cell including precise fan-out loading. Finally, it compares the clock pin delays with those reported by a static analysis tool. Unlike conventional gate-level verification tools, CRITIC can handle any clock scheme including multiplexed clocks and domino logic because of its transistor-level approach. Furthermore, rather than relying on limited gate-level cell models, CRITIC`s use of SPICE-level cell models helps ensure timing accuracy. Generation of timing information in SDF permits CRITIC`s high-precision timing results to be used for more accurate analysis of critical paths, or for optimization of the design during physical implementation.

CRITIC also automatically analyzes critical paths chosen by the chip designer, usually from a report generated by a static timing tool. After the designer begins analysis, CRITIC automatically handles the subsequent steps, including back-annotation of post-layout parasitics, which can dramatically affect the timing of critical paths in nanometer designs. Additionally, CRITIC can automatically include secondary loads to these paths to account for Miller capacitance and other loading effects. After analyzing the design, CRITIC automatically performs the tedious task of setting side branch values to enable or sensitize the critical paths as well as creating input patterns for dynamic simulation of the paths. Unlike traditional solutions, which require a SPICE simulation run for each path to be analyzed, CRITIC simulates all paths together at once, reducing the number of simulation licenses required for analysis. During this simulation, CRITIC uses the SPICE model for each cell in each simulated path. Finally, CRITIC compares the path delays with those reported by a static analysis tool and provides the designer with a detailed report on timing differences between those results and CRITIC`s results. Using this data, designers can fix timing problems and selectively optimize signal or clock nets for maximum performance.

Pricing and Availability

CRITIC is available immediately directly from Nassda. Pricing for time-based licenses start from $65,000. CRITIC is supported on Sun Solaris, HP-UX, Windows XP/NT/2000 and Linux platforms.

About Nassda

Nassda Corporation (Nasdaq:NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, mixed signal, memory, system-on-chip and high performance digital designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

The specific features, functionality, and release timing of any new products or tools described in this press release remain at the sole discretion of Nassda Corporation and Nassda does not make any warranty as to when or if such specific features, functionality or release may occur.

Note to Editors: Nassda and HSIM are registered trademarks and CRITIC is a trademark of Nassda Corporation. All other trademarks and registered trademarks are the property of their owners.



--------------------------------------------------------------------------------
Contact:
Nassda Corporation
Graham Bell, 408/562-9168
[e-mail]
or
Lee Public Relations
Gloria Nichols, 650/363-0142
[e-mail]



--------------------------------------------------------------------------------
Source: Nassda Corporation

[baedman]

ist zwar toll wie du alle neuen Infos in den Thread reinkopierst, sicherlich sind deine Meinung und Einschätzung zu Nassda aber weitaus interessanter!!

[benefactor [KommA]]

MOVER(-): Heavy Volume Pushes NSDA Lower

Ridgeland, MS, JAN 10, 2003 (EventX/Knobias.com via COMTEX) -- Nassda Corporation (NasdaqNM: NSDA)

- Last Trade: $ 6.79200

- Down: $ 4.26800

- % Change: -38.58951%

- Volume at Publication: 340,700

- 20-day Average Volume: 69,896

Recent company news:

12/31/02: Nassda Corporation (Nasdaq:NSDA), a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced it will hold a live webcast on Thursday, January 16, 2003, at 2:00 p.m. PST for interested members of the investment community to discuss the company`s first quarter fiscal 2003 results and business outlook. Sang Wang, chief executive officer, and Tammy Liu, chief financial officer, will host the call. The company will release earnings after the market close on January 16, 2003.

12/19/02: Nassda Corp. (Nasdaq:NSDA)announced today that CEO Sang Wang and CFO Tammy Liu will be featured speakers at the Fifth Annual Needham Growth Conference.

Recent company filings:

10-K filed on 12/23/02 included the following:

Twelve months ended: 09/30/02; 09/30/01

Total Revenues: $6,770,000; $21,943,000

Net Income: $1,002,000; $2,091,000

Technical analysis:

- Below 4 of 4 moving averages

- Near-term support price: $ 10.65000

- Near-term resistance price: $ 11.26000

GET KNOBIAS IN REAL-TIME: Delivery of this proprietary Knobias alert has been delayed by 10 minutes. To get all Knobias alerts in real-time daily, visit http://www.knobias.com/cmtx

[panik]

10:14AM Nassda: more from EE Times (NSDA) 6.43 -4.63: -- Update -- EE Times story noted in 10:10 comment also reports that the court official has found that an NSDA employee intentionally altered or destroyed data despite being warned not to do so.

10:10AM Nassda hit by EE Times article (NSDA) 6.35 -4.71: -- Update -- Stock getting crushed, we`re hearing that it`s due to a story in the EETimes that a court official in Santa Clara county has shifted the burden of proof in NSDA`s case against Synopsys (SNPS); instead of SNPS having to prove that NSDA is guilty, NSDA must now prove that it is not guilty. The story was posted shortly before the close yesterday, but is apparently only being discovered this morning.

10:06AM Volume Alert: Nassda implodes on heavy volume (NSDA) 6.49 -4.57:









Dies ist der artikel:
http://www.eedesign.com/news/OEG20030109S0042



Nassda officials destroyed evidence in Synopsys case, judge says
By Michael Santarini
EE Times
January 9, 2003 (2:58 p.m. EST)

SAN MATEO, Calif. — An official with Santa Clara County Superior Court has handed circuit simulation vendor Nassda Corp. what could be a major setback in a trade-secrets case filed against it by Synopsys Inc.

In the last week of December, retired Judge Read Ambler, serving as a "discovery referee" reviewing motions in the case filed by Synopsys, found that ex-Synopsys employees-turned-Nassda founders checked out copies of Synopsys products days before leaving Synopsys. They then used those products to develop Nassda`s flagship simulator HSIM, the official found. Ambler also ruled that some defendants destroyed evidence.

That finding prompted the referee to change the burden of proof in the case, according to Ted Chan, a lawyer for Synopsys. Instead of Synopsys having to prove that Nassda was guilty, Nassda must now prove it is not guilty, Chan said.

If the case proceeds to trial, the judge said in his ruling, it will be presumed that defendants Walter Chan, An-Chang Deng, Jeff Tuan, Yuri Feinberg and Andrew Tcherniaev each individually checked out the Synopsys CVS database "days" before leaving their jobs at Synopsys then used that code to develop Nassda`s HSIM.

Ambler`s ruling describes how some defendants willfully destroyed evidence. It charges that Chan, who had checked out Synopsys` CVS database (which contained the company`s ETG products) before leaving the company in 1998, reportedly "lost" his Pentium 333 home computer that Synopsys believes held a copy of the Synopsys CVS product and allegedly the beginnings of the HSIM product.

The ruling also describes how Chan then lost a Zip drive, Zip disk and diskettes allegedly used to transfer data between his Synopsys work computer, his home computer and a work computer at Nassda.

In the ruling, the judge contends Chan copied information from his home Pentium 333 to a new Pentium 550 machine he used at home; but much of the information on the Pentium 555 and a work laptop referred to in the ruling as "HR" was erased by Chan, defragmented and then covered with 29,000 lines of code, the judge wrote.

"Nassda has urged what it contends are plausible explanations for Mr. Chan`s conduct concerning the Pentium 550, but circumstantial evidence is too strong to the contrary to avoid the finding, expressly made here, that Mr. Chan willfully destroyed relevant Synopsys and Nassda data contained in his computer to avoid its being recovered pursuant to Synopsys` impending motion to inspect," Ambler wrote.

Source code usage


The judge also ruled that "Synopsys source code was used by Mr. Chan on the HR computer, which was recovered by the courts, in the writing of Nassda HSIM source code."

"The HR computer contained at least traces of source code for Synopsys ETG products and Nassda data relevant to all causes of action herein when Nassda intentionally altered and/or destroyed that data," Ambler stated.

Ambler also found that defendant Jeff Tuan erased Zip disk and floppy disk information that may have contained data relevant to the case even though he was warned that doing so could bring sanctions against him.

As a result, Tuan was named in a similar ruling as Chan, with the Judge stating that it will be presumed that Tuan checked out Synopsys CVS days before leaving the company, that he used the Synopsys CVS to write HSIM, and that he later wiped the Zip drive and floppies, presumably used as backups, prior to Synopsys` motion of discovery with the courts.

"Nassda respectfully disagrees with some of the discovery referee`s rulings," Nassda`s president and chief executive officer Sang Wang said in a prepared statement. "None of these rulings, however, is dispositive of any issue in the case. Synopsys` attorneys have had access to Nassda`s proprietary source code to HSIM for over a year and have not identified to Nassda or the court specific evidence showing any use of Synopsys proprietary information. Nassda believes that the evidence at trial will show that Synopsys` claims against it lack any merit and intends to vigorously defend itself."

In addition to the trade secret suit, Synopsys also has a second patent infringement case filed against Nassda. The patent office is in the process of reviewing that case. Synopsys has yet to state publicly what damages it is seeking from Nassda. The trade secret suit is still in the "discovery phase" and is not expected to go to court until the middle of this year at the earliest.

[panik]

Nassda Announces Record Revenue for the Quarter Ended December 31, 2002
Thursday January 16, 4:26 pm ET
Revenue of $10.3 Million, Net Income of $2.0 Million, or $0.07 Per Diluted Share


SANTA CLARA, Calif.--(BUSINESS WIRE)--Jan. 16, 2003--Nassda Corporation (Nasdaq:NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced financial results for the quarter ended December 31, 2002, the first quarter of Nassda`s fiscal 2003. Revenue for the quarter ended December 31, 2002 was $10.3 million, a 46% increase from $7.1 million for the quarter ended December 31, 2001 and a 5% increase from $9.9 million for the quarter ended September 30, 2002.
ADVERTISEMENT


Net income for the quarter ended December 31, 2002 was $2.0 million, or $0.07 per diluted share, up 98% from $1.0 million or $0.04 per diluted share, for the quarter ended December 31, 2001 and a decrease from $2.2 million, or $0.08 per diluted share, for the quarter ended September 30, 2002.

Excluding stock-based compensation expense, pro forma net income was $2.2 million, or $0.08 per diluted share, for the quarter ended December 31, 2002, up 74% from $1.3 million, or $0.05 per diluted share, for the quarter ended December 31, 2001 and a slight decrease from $2.3 million, or $0.08 per diluted share, for the quarter ended September 30, 2002.

"I am happy to announce that we have just achieved our 13th consecutive quarter of revenue growth and had a 30% operating margin for the quarter, excluding stock-based compensation," said Sang Wang, Chief Executive Officer. "First fiscal quarters are always seasonally challenging and the semiconductor industry has remained weak. Nevertheless, Nassda`s team continued to focus on providing our leading solutions with the highest quality of support and pushed ahead with full force to achieve our goals. More importantly, we added more than fifteen new customers."

Business Outlook

Going forward, Nassda expects the global economic climate for the electronics and semiconductor industry to remain challenging despite the transition from 0.18 micron to smaller silicon geometries of 0.13 micron and 0.09 micron (90 nanometers). Nassda believes this shift to ever-smaller nanometer geometries is continuing, and that the requirement for full-chip transistor-level circuit simulation is becoming ever more critical. As a result, Nassda expects revenue of $11.2 million to $11.6 million, fully diluted earnings per share of approximately $0.07 and pro forma diluted earnings per share of approximately $0.08 for the quarter ending March 31, 2003, which is the second quarter of Nassda`s fiscal 2003.

Nassda will hold a conference call that includes business outlook, with financial analysts and investors at 2:00 p.m. PST today. A live webcast of the call will be available on Nassda`s web site at http://www.nassda.com or http://www.companyboardroom.com. Following completion of the call, a rebroadcast of the webcast will be available at http://www.nassda.com or http://www.companyboardroom.com through January 23, 2003.

Those without internet access may listen to a replay of the call by dialing [phone], access code 630061. The replay will be available from 5:00 p.m. PST on January 16, 2003 through January 23, 2003.

About Nassda

Nassda Corporation (Nasdaq:NSDA - News) is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, high-performance digital, and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

Forward Looking Statements

This press release contains forward-looking statements regarding the visibility of future revenue, revenue growth, operating margin, operating expenses and pro forma and diluted earnings per share that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words that imply a future state, such as "expects" or "anticipates," or that imply that a particular future event or events will occur, such as "will," "remain," "may," or the negative of these terms. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation, future performance is dependent on: Nassda`s product development schedules, the design performance of Nassda`s existing and new electronic design automation software and other tools, as well as customer`s adoption of Nassda`s products and those customer`s design and manufacturing schedules. In addition, reduced capital spending or delayed implementation of programs due to adverse general economic conditions and reduced demand for products containing complex nanometer-scale semiconductors may impact Nassda`s future performance. These risks, uncertainties and other factors may cause Nassda`s actual results, levels of activity, performance or achievements to differ materially from those expressed or implied by the forward-looking statements.

Forward-looking statements are only predictions and the actual events or results may differ materially. Nassda cannot provide any assurance that its future results will meet expectations. In addition, historical information should not be considered a predictor of future performance. Neither Nassda nor any other person assumes responsibility for the accuracy and completeness of these forward-looking statements. Nassda disclaims any obligation to update information contained in any forward-looking statement.

For additional information and considerations regarding the risks faced by Nassda, see Annual Report on Form 10-K, as filed with the Securities and Exchange Commission.

Nassda and HSIM are registered trademarks of Nassda Corporation.

-0-

Nassda Corporation
Unaudited Consolidated Income Statements
(in thousands, except per share data)

Three Months Ended
December 31,
2002 2001
------------ -----------
Revenue:
Product $ 4,632 $ 4,513
Subscription 3,748 1,590
Maintenance 1,955 989
------------ -----------
Total revenue 10,335 7,092
------------ -----------

Cost of revenue:
Cost of product revenue 66 80
Cost of subscription revenue 86 50
Cost of maintenance revenue 201 157
------------ -----------
Total cost of revenue 353 287
------------ -----------

Gross profit 9,982 6,805
------------ -----------

Operating expenses:
Research and development 1,529 1,311
Sales and marketing 2,876 2,118
General and administrative 2,464 1,665
Stock-based compensation 248 252
------------ -----------
7,117 5,346
------------ -----------

Income from operations 2,865 1,459
Other income, net 248 116
------------ -----------
Income before income taxes 3,113 1,575
Provision for income taxes (1,090) (554)
------------ -----------
Net income $ 2,023 $ 1,021
============ ===========

Earnings per share:
Basic $ 0.08 $ 0.09
Diluted $ 0.07 $ 0.04
Pro forma $ 0.08 $ 0.05

Shares used in computing earning per share:
Basic 24,363 11,770
Diluted 28,923 23,943
Pro forma 29,136 24,238

Net income $ 2,023 $ 1,021
Stock-based compensation 248 252
Stock-based compensation Tax Impact (53)
------------ -----------
Pro forma net income $ 2,218 $ 1,273
------------ -----------


Nassda Corporation
Condensed Consolidated Balance Sheets
(in thousands)

December September
31, 30,
2002 2002
----------- ---------
(unaudited)
ASSETS
Current assets:
Cash, cash equivalents and short-term
investments $ 80,826 $ 78,452
Accounts receivable, net of allowance 5,707 4,156
Prepaid expenses and other current assets 969 553
Deferred income taxes 2,314 2,050
----------- ---------
Total current assets 89,816 85,211
Property and equipment, net 772 784
Other assets 708 727
----------- ---------
Total assets $ 91,296 $ 86,722
=========== =========

LIABILITIES AND STOCKHOLDERS` EQUITY
Current liabilities:
Accounts payable $ 391 $ 555
Accrued compensation 2,516 4,130
Accrued liabilities 1,873 1,982
Income taxes payable 868 882
Deferred revenue 7,837 6,065
----------- ---------
Total current liabilities 13,485 13,614
Long-term liabilities 2 54
----------- ---------
Total liabilities 13,487 13,668
----------- ---------

Stockholders` equity:
Common stock 25 25
Additional paid-in capital 68,851 66,378
Deferred stock-based compensation (1,959) (2,208)
Accumulated other comprehensive income 16 6
Retained earnings 10,876 8,853
----------- ---------
Total stockholders` equity 77,809 73,054
----------- ---------
Total liabilities and stockholders` equity $ 91,296 $ 86,722
=========== =========



--------------------------------------------------------------------------------
Contact:
Nassda Corporation
Tammy Liu, 408/327-7710
[e-mail]
[e-mail]



--------------------------------------------------------------------------------
Source: Nassda Corporation

[panik]

Nassda Ranked Number 3 of 25 Rising Stars in the Deloitte & Touche Technology Fast 500 Program
Tuesday February 4, 4:31 pm ET
Attributes its 13,119 Percent Revenue Growth to Technology, Productivity & Customer Success


SANTA CLARA, Calif.--(BUSINESS WIRE)--Feb. 4, 2003-- Nassda Corporation (Nasdaq: NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design of complex semiconductors, has been named the 3rd fastest growing company of the 25 Rising Stars in the 2002 Deloitte & Touche Technology Fast 500, a ranking of the 500 fastest growing technology companies in North America. A special category of 25 Rising Star winners, companies in business between three to five years, are ranked based on percentage of growth in revenues between 1999 and 2001. Nassda`s revenues increased 13,119 percent over that three year period.
Nassda`s CEO, Sang Wang, credits innovation, productivity and customer satisfaction as drivers for the company`s dramatic revenue growth. "We are honored to receive this award, which recognizes our ability to achieve solid growth and increasing profitability in spite of a challenging business climate. From 1999 to 2001, we grew the full-chip verification market and we believe we continue to lead in this space through our innovative technology, high productivity and dedication to our customer`s satisfaction and design success," Wang said.

"To rank on the Deloitte & Touche Technology Fast 500 Rising Star, companies must have phenomenal revenue growth in a three-year period. Nassda has proven to be one of the fast-growth success stories, and we applaud its vision," said Mark A. Evans, managing director, Deloitte & Touche Technology, Media, & Telecommunications Group.

To qualify as a Fast 500 Rising Star, companies must have had operating revenues of at least $50,000 USD in 1999 and $75,000 CD for the United States and Canada, respectively, must be public or private companies headquartered North America, and be "technology companies" defined as companies that own proprietary technology which contributes to a significant portion of the company`s operating revenues or devotes a high percentage of effort to research and development of technology. See www.fast500.com for more information.

About Nassda

Nassda Corporation (Nasdaq: NSDA - News) is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, mixed signal, memory, system-on-chip and high performance digital designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

About Deloitte & Touche

Deloitte & Touche, one of the nation`s leading professional services firms, provides assurance and advisory, tax, and management consulting services through nearly 30,000 people in more than 100 U.S. cities. The firm is dedicated to helping its clients and its people excel. Known as an employer of choice for innovative human resources programs, Deloitte & Touche has been recognized as one of the "100 Best Companies to Work for in America" by Fortune magazine for five consecutive years. Deloitte & Touche refers to Deloitte & Touche LLP and its related entities. Deloitte & Touche is the U.S. national practice of Deloitte Touche Tohmatsu. Deloitte Touche Tohmatsu is a Swiss Verein, and each of its national practices is a separate and independent legal entity. For more information, please visit Deloitte & Touche`s Web site at www.deloitte.com.

Please note that our historical revenue growth as described in this press release may not be indicative of future periods.

Nassda is a registered trademark of Nassda Corporation. All other trademarks and registered trademarks are the property of their owners.



--------------------------------------------------------------------------------
Contact:
Nassda Corporation
Graham Bell, 408/562-9168
[e-mail]
or
Lee Public Relations
Gloria Nichols, 650/363-0142
[e-mail]



--------------------------------------------------------------------------------
Source: Nassda Corporation

[Chipdesign]

Nassda Revises Expectations for Second Quarter of Fiscal 2003
Wednesday April 2, 4:00 pm ET


SANTA CLARA, Calif., April 2 /PRNewswire-FirstCall/ -- Nassda Corporation (Nasdaq: NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced that it is revising its revenue and earnings expectations for its second fiscal quarter ended March 31, 2003. Nassda now estimates revenue of approximately $8.8 million and net income of $0.04 per fully diluted share. These revised estimates are below its previously stated expectations of revenue of $11.2 million to $11.6 million and fully diluted earnings per share of approximately $0.07.
ADVERTISEMENT


The shortfalls were primarily due to the prolonged economic slowdown, customers` further reducing or delaying their capital budget spending, postponing purchases, particularly by the major accounts, and increase in competitive pricing pressure. These factors together have contributed to both the substantial lengthening of the sales cycle and unexpected decrease in orders.

For the third quarter of fiscal 2003, Nassda expects revenue of approximately $7.0 million and net income of approximately $0.00 per fully diluted share. For the fiscal year 2003, Nassda now expects revenue of approximately $33.9 million to $34.1 million and net income of $0.11 - $0.12 per fully diluted share as compared to the earlier estimates of $45 million to $47 million in revenue and net income of $0.31 to $0.33 per fully diluted share.

Nassda will host a conference call today at 2:30 p.m. PST, 5:30 p.m. EST, regarding this announcement. A live webcast of the call will be available on Nassda`s web site at http://www.nassda.com or http://www.companyboardroom.com . Following completion of the call, a rebroadcast of the webcast will be available at http://www.nassda.com or http://www.companyboardroom.com through April 15, 2003. Those without internet access may listen to a replay of the call by dialing 719-457-0820, access code 464047. The replay will be available from 5:00 p.m. PST on April 2, 2003 through April 15, 2003.

Nassda will also host its earnings conference call for the quarter ended March 31, 2003 on Wednesday, April 16, 2003 at 2:00 p.m. PDT. A live webcast of the call will be available on Nassda`s Web site at http://www.nassda.com or http://www.companyboardroom.com . Following the completion of the call, a rebroadcast of the webcast will be available at http://www.nassda.com or http://www.companyboardroom.com through April 23, 2003. Those without internet access may listen to a replay of the call by dialing 719-457-0820, access code 389514. The replay will be available from 5:00 p.m. PDT on April 16, 2003 through April 23, 2003.

About Nassda

Nassda Corporation is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, high-performance digital, and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com .

Forward Looking Statements

This press release contains forward-looking statements regarding the future revenue, net income, and earnings per share that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation, compliance of transactions entered into during the quarter with Nassda`s revenue recognition policy; any adjustments made to the operating results after the close of the quarter; the results of the review of Nassda`s independent auditors, Nassda`s product development schedules, the design performance of Nassda`s existing and new electronic design automation software and other tools, as well as customer`s adoption of Nassda`s products and those customer`s design and manufacturing schedules. In addition, reduced capital spending or delayed implementation of programs due to adverse general economic conditions and reduced demand for products containing complex nanometer-scale semiconductors may impact Nassda`s future performance. These risks, uncertainties and other factors may cause Nassda`s actual results, levels of activity, performance or achievements to differ materially from those expressed or implied by the forward-looking statements. For additional information and considerations regarding the risks faced by Nassda, see Annual Report on Form 10-K, as filed with the Securities and Exchange Commission.

NOTE: Nassda is a registered trademark of Nassda Corporation.




--------------------------------------------------------------------------------
Source: Nassda Corporation

[Chipdesign]

Nassda Ranked No. 2 on Electronics Business` List of `30 Best Small Electronics Companies`
Tuesday April 8, 4:00 pm ET


SANTA CLARA, Calif., April 8 /PRNewswire-FirstCall/ -- Nassda Corp. (Nasdaq: NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design of complex nanometer semiconductors, has been named No. 2 on Electronics Business` list of 30 best small electronics companies. Companies were ranked by annual revenue growth from 2000 to 2002.
ADVERTISEMENT


"We are honored to be ranked highly on Electronic Business` list of the 30 best small electronics companies," said Sang Wang, chief executive officer of Nassda. "Continued expansion of product usage by our broadening customer base was the major reason for our achievement, and we appreciate our customers` belief in Nassda. Our excellent staff who develops, distributes and supports our new-generation nanometer IC simulation and analysis solutions was another key contributing factor. Through innovations, we believe, Nassda will lead the full-chip verification and analysis field and continue to satisfy our customers` requirements."

The Reed Research Group of Electronics Business picked the 30 best small companies by compiling a list of more than 200 public electronics companies with annual revenues less that $250 million that had shown strong annual and quarterly revenue growth, and a short list of noteworthy private companies. Sources included public databases, Internet resources, Electronic Business files and nominations submitted by Electronic Business readers. Both financial performance and qualitative factors such as innovation, leadership and technology were used to make the final selection of the 30 best small companies.

About Nassda

Nassda Corporation is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, mixed signal, memory, system-on-chip and high performance digital designs. Nassda`s products help enable first silicon success and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com .

Please note that our historical revenue growth as described in this press release may not be indicative of future periods.

NOTE: Nassda is a registered trademark of Nassda Corporation. All other trademarks and registered trademarks are the property of their respective owners.




--------------------------------------------------------------------------------
Source: Nassda Corporation

[panik]

Nassda`s HSIM Meets Intersil`s Verification Needs
Wednesday April 9, 4:00 pm ET
HSIM Circuit Simulator Delivers Required Speed, Capacity and Accuracy For Verifying Intersil`s Complex WLAN Building Blocks


SANTA CLARA, Calif., April 9 /PRNewswire-FirstCall/ -- Nassda Corporation (Nasdaq: NSDA - News) today announced that Intersil Corporation, a world leader in the design and manufacture of high performance analog and wireless networking solutions, has selected Nassda`s HSIM® simulator and analysis tool for the design and verification of complex mixed-signal circuit blocks used in Intersil`s PRISM® wireless local area network (WLAN) integrated circuits (ICs).

With its PRISM portfolio of WLAN solutions, Intersil is a leading supplier of WLAN chip sets for 5 GHz (802.11a) and 2.4 GHz (802.11b and 802.11g) WLAN solutions. Under a multi-license agreement, Intersil PRISM chip set designers will use Nassda`s HSIM circuit simulator to perform detailed transistor-level analysis needed to assist in the first-pass silicon success of PRISM ICs. Intersil is using HSIM`s integration with the Cadence analog design environment.

"Detailed transistor-level analysis is essential for verifying performance of complex wireless building blocks, but older simulation tools can take days or weeks to complete a single simulation run for these designs," said David Landeta, Director of Engineering for Intersil`s Wireless Networking Product Group. "HSIM gives us as much as a 40x speed improvement for transistor-level verification, so our designers will be able to perform simulations that they normally would have shunned because those simulations would have taken too long."

"Along with its performance, HSIM`s ability to fit easily into our design flow is critical," said Steve Gaul, the Analog / Mixed-Signal Design Flow Architect at Intersil. "HSIM`s compatibility with other simulation tools allows us to insert it into our existing flow, and its tight integration with the Cadence analog design environment helps speed the overall development process."

"In the highly competitive WLAN arena, the ability to complete detailed verification and analysis quickly is essential for success," said Sang Wang, CEO of Nassda. "We`re pleased to be working closely with Intersil as it uses HSIM to speed verification and help ensure first-silicon success in its complex WLAN ICs."

About HSIM

HSIM provides detailed circuit-level analysis of timing and power behavior and signal integrity effects. It solves the critical issue of analyzing circuit behavior while taking into account the electrical and parasitic effects of nanometer-scale silicon. It is ideal for demanding analog, memory, mixed-signal and system-on-chip designs.

About Intersil

Intersil Corporation is a global semiconductor leader in the design and manufacture of high performance analog and wireless networking solutions. The acquisition of Elantec Semiconductor, Inc., expanded Intersil`s product portfolios to address four fast growing markets -- flat panel displays, optical storage (CD and DVD recordable), power management and wireless networking. Intersil brings added customer value in providing complete silicon, software and reference design solutions to new products that enhance the computing experience for people wherever they live, work or travel. For more information about Intersil or to find out how to become a member of our winning team, visit the company`s web site and career page at: www.intersil.com.

About Nassda

Nassda Corporation is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, and mixed-signal SoC designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at www.nassda.com.

NOTE: Nassda and HSIM are registered trademarks of Nassda Corporation. PRISM is a registered trademark of Intersil Americas Inc. All other trademarks and registered trademarks are the property of their owners.




--------------------------------------------------------------------------------
Source: Nassda Corporation

[panik]

Nassda Announces Revenue of $8.8 Million for the Quarter Ended March 31, 2003 Net Income of $1.0 million, or $0.04 per diluted share
Wednesday April 16, 4:02 pm ET


SANTA CLARA, Calif., April 16 /PRNewswire-FirstCall/ -- Nassda Corporation (Nasdaq: NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced financial results for the quarter ended March 31, 2003, the second quarter of Nassda`s fiscal 2003. Revenue for the quarter ended March 31, 2003 was $8.8 million, a 10% increase from $8.0 million for the quarter ended March 31, 2002 and a 15% decrease from $10.3 million for the quarter ended December 31, 2002.
ADVERTISEMENT


Net income for the quarter ended March 31, 2003 was $1.0 million, or $0.04 per diluted share, a decrease from $1.4 million, or $0.05 per diluted share, for the quarter ended March 31, 2002 and a decrease from $2.0 million, or $0.07 per diluted share, for the quarter ended December 31, 2002.

For the six months ended March 31, 2003, revenue was $19.1 million, a 27% increase from $15.1 million for the six months ended March 31, 2002. Net income for the six months ended March 31, 2003 was $3.0 million, or $0.11 per diluted share, a 26% increase from $2.4 million, or $0.09 per diluted share, for the six months ended March 31, 2002.

"Although we remained profitable this quarter, we did not achieve our goals as many customers reduced or delayed their spending to control their own operating expenses and improve their bottom line results," said Sang Wang, Chief Executive Officer. "Nevertheless, our cash and short term investments increased by approximately $4.2 million during the quarter and totaled $85.0 million as of March 31, 2003. Consistent with our historical trend, we have also added more than 10 new customers last quarter. Despite the change in customers` spending behavior, we intend to continue to improve our competitive position and productivity. Our upcoming version 3.0 release of HSIM with many new enhancements will be shipped this month, and our fourth product is on schedule to be introduced in May 2003. We are committed to helping our customers to weather through the tough economic times and make their complex nanometer IC products successful."

Business Outlook

Moving forward, we do not yet see any meaningful improvements in our customers` spending pattern for the balance of fiscal 2003. As a result, we expect revenue of approximately $7.0 million and fully diluted earnings per share of approximately $0.00 for the quarter ending June 30, 2003. For fiscal 2003, we now expect revenue of approximately $33.9 million to $34.1 million and net income of $0.11 to $0.12 per fully diluted share.

Nassda will hold a conference call that includes a discussion of our business outlook with financial analysts and investors at 2:00 p.m. PDT today. A live webcast of the call will be available on Nassda`s web site at http://www.nassda.com or http://www.companyboardroom.com . Following completion of the call, a rebroadcast of the webcast will be available at http://www.nassda.com or http://www.companyboardroom.com through April 23, 2003. Those without internet access may listen to a replay of the call by dialing 719-457-0820, access code 389514. The replay will be available from 5:00 p.m. PDT on April 16, 2003 through April 23, 2003.

About Nassda

Nassda Corporation is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, high-performance digital and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com .

Forward-Looking Statements

This press release contains forward-looking statements regarding the visibility of future revenue, revenue growth, operating margin, operating expenses and diluted earnings per share and acceptance of new products that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation, future performance being dependent on: availability of customer budgets for Nassda`s products, Nassda`s product development schedules, the design performance of Nassda`s existing and new electronic design automation software and other tools, as well as customer`s adoption of Nassda`s products and those customer`s design and manufacturing schedules. In addition, continued reduced capital spending or delayed implementation of programs due to adverse general economic conditions and reduced demand for products containing complex nanometer-scale semiconductors may impact Nassda`s future performance. These risks, uncertainties and other factors may cause Nassda`s actual results, levels of activity, performance or achievements to differ materially from those expressed or implied by the forward-looking statements. In addition, historical information should not be considered a predictor of future performance. Neither Nassda nor any other person assumes responsibility for the accuracy and completeness of these forward-looking statements. Nassda disclaims any obligation to update information contained in any forward-looking statement.

For additional information and considerations regarding the risks faced by Nassda, see Nassda`s Annual Report on Form 10-K for the fiscal year ended September 30, 2002 and Quarterly Reports on Form 10-Q for the quarter ended December 31, 2002, as filed with the Securities and Exchange Commission.

NOTE: Nassda and HSIM are registered trademarks of Nassda Corporation.

Nassda Corporation
Unaudited Consolidated Income Statements
(in thousands, except per share data)

Three Months Ended Six Months Ended
March 31, March 31,
2003 2002 2003 2002

Revenue
Product $3,211 $4,408 $7,843 $8,921
Subscription 3,443 2,450 7,191 4,040
Maintenance 2,145 1,163 4,100 2,152
Total Revenue 8,799 8,021 19,134 15,113

Cost of Revenue
Cost of product revenue 63 55 129 135
Cost of subscription
revenue 84 67 170 117
Cost of maintenance
revenue 197 156 398 313
Total cost of revenue 344 278 697 565

Gross profit 8,455 7,743 18,437 14,548

Operating expenses:
Research and
development 1,706 1,274 3,235 2,585
Sales and marketing 2,873 2,292 5,749 4,410
General and
administrative 2,414 1,857 4,878 3,522
Stock-based
compensation 248 252 496 504
Total Operating
expenses 7,241 5,675 14,358 11,021

Income from operations 1,214 2,068 4,079 3,527
Other income, net 246 214 494 330
Income before income
taxes 1,460 2,282 4,573 3,857
Provision for income
taxes (438) (890) (1,528) (1,444)
Net income $1,022 $1,392 $3,045 $2,413

Earnings per share:
Basic $0.04 $0.06 $ 0.12 $0.14
Diluted $0.04 $0.05 $0.11 $0.09

Shares used in
computing earning
per share:
Basic 24,889 22,034 24,626 16,902
Diluted 28,452 28,977 28,687 26,460



Nassda Corporation
Condensed Consolidated Balance Sheets
(in thousands)

March 31, September 30,
2003 2002
(unaudited)

ASSETS

Current assets:
Cash, cash equivalents and
short-term investments $85,008 $78,452
Accounts receivable, net of allowance 2,927 4,156
Prepaid expenses and other current assets 1,438 553
Deferred income taxes 2,405 2,050
Total current assets 91,778 85,211
Property and equipment, net 921 784
Other assets 638 727
Total assets $93,337 $86,722

Liabilities and Stockholders` Equity
Current liabilities:
Accounts payable $51 $555
Accrued compensation 2,616 4,130
Accrued liabilities 2,623 1,982
Income taxes payable 1,165 882
Deferred revenue 7,452 6,065
Total current liabilities 13,907 13,614
Long-term liabilities 119 54
Total liabilities 14,026 13,668

Stockholders` equity:
Common stock 25 25
Additional paid-in capital 69,089 66,378
Deferred stock-based compensation (1,711) (2,208)
Accumulated other comprehensive income 10 6
Retained earnings 11,898 8,853
Total stockholders` equity 79,311 73,054
Total liabilities and stockholders` equity $93,337 $86,722




--------------------------------------------------------------------------------
Source: Nassda Corporation

[panik]

Nassda Announces Hybrid Timing Analyzer for Leading-Edge Custom Digital Designs
Monday May 5, 4:01 pm ET
New Tool Automatically Finds Critical Paths Including Impact of Crosstalk With SPICE-Like Accuracy


SANTA CLARA, Calif., May 5 /PRNewswire-FirstCall/ -- Nassda(TM) Corporation (Nasdaq: NSDA - News) today introduced HANEX(TM), a circuit-level timing and crosstalk analysis tool for leading-edge custom digital designs at 130nm processes and below. HANEX analyzes the timing of nanometer circuits and determines critical delay paths using a hybrid of dynamic and static methods that accurately captures nanometer parasitic effects on circuit behavior.
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HANEX is believed to be the first hybrid analysis tool able to automatically identify critical paths including the impact of crosstalk effects on signal timing for custom CMOS digital designs with millions of elements. This new tool fills the gap between static analysis methods and increasing requirements for more accurate timing analysis to ensure successful silicon for leading-edge nanometer designs.

"For high-performance digital designs at the 130nm process technology and below, engineers who use static analysis will experience insufficient timing accuracy because of undetected dynamic nanometer effects such as crosstalk," said Joy Han, product marketing manager at Nassda. "As a result, digital IC manufacturers can produce silicon that fails to meet performance objectives even though static timing sign-off analysis has been completed. Designed to meet nanometer challenges, we believe HANEX delivers results with the accuracy of dynamic simulation and the speed and comprehensive coverage of static analysis. With HANEX, we believe custom digital IC designers can quickly gain detailed timing results with SPICE-like accuracy in hours rather than the days or weeks required with traditional SPICE simulation."

Need for Hybrid Analysis

"For leading-edge custom digital designers, verification can no longer be limited to either dynamic or static analysis at the circuit-level," said An-Chang Deng, Nassda`s president. "We believe our innovative hybrid technology in HANEX delivers a new level of accuracy and performance by optimizing the advantages of both dynamic and static analysis methods."

Dynamic simulation relies on large numbers of vectors to verify circuit performance. While dynamic simulation provides detailed accuracy, engineers have struggled to create efficient sets of vectors that could ensure comprehensive coverage or reveal worst-case operation of circuits. The migration to more advanced nanometer processes increases the complexity of the verification problem and requires more accurate and efficient solutions.

Created to address growing verification complexity, static-timing analysis (STA) methods eliminate the need for simulation vectors, using exhaustive search techniques across all possible paths to report on timing violations. Although this approach delivers results relatively quickly, it can lead to wasted efforts as engineers investigate timing problems which would not be encountered in the actual circuit, called false paths. STA methods are also proving less effective in analyzing high-performance nanometer designs because they are unable to account for the timing impact of dynamic nanometer effects such as crosstalk. In practice, these methods typically estimate these effects using coarse approximations that return unreliable results, limiting engineers` ability to achieve full timing optimization and potentially leading to delays in product development and time-to-market.

HANEX Features

HANEX provides a complete, integrated verification solution for leading-edge custom digital designs at both the pre-layout and post-layout stages. With its hybrid analysis method, HANEX finds critical delay paths in combinational, latch/flip-flop and dynamic logic. HANEX simulates entire critical paths simultaneously, taking into consideration voltage-dependent capacitance, Miller capacitance and non-linear input slopes to provide better accuracy. In addition to its timing checks, HANEX verifies setup and hold timing for sequential logic and uses dynamic accurate clock network analysis to provide slack information. HANEX significantly reduces the reporting of false paths by the use of dynamic methods that propagate well-defined control and clock signals in a design.

HANEX`s crosstalk analysis capabilities provide a more realistic assessment of circuit behavior than pure STA methods. Conventional STA methods approximate coupling capacitors with grounded capacitors, leading to increasing timing error with decreasing geometries. In contrast, HANEX`s optional crosstalk analysis uses internal dynamic simulation to calculate the delay caused by coupling capacitors. HANEX`s proprietary concurrent signal propagation capability analyzes the maximum impact of neighboring nets on circuit performance, capturing exact signal transition windows and transition states to provide accurate delay calculations and reveal crosstalk effects.

HANEX also uses its hybrid capabilities to provide accurate clock network timing simulation by automatically identifying and tracing the clock network starting with user-defined clock sources. After it back-annotates interconnect parasitics (from any third-party extraction software) to the associated clock network, HANEX simulates the entire network dynamically with precise fan-out loading, and uses clock arrival time and slope at every clock sink for timing verification.

HANEX is designed for ease-of-use and tight integration in existing digital design flows. The detection of timing violations and control of analysis accuracy are typically automatic with a minimum of user setup time. The tool supports a variety of device models and SPICE netlist formats and can generate timing data needed for IP characterization in digital ASIC flows.

Pricing and Availability

HANEX is currently available to limited customers. Pricing for time-based licenses start at $72,000 depending on configuration. HANEX is supported on the Sun Solaris, HP-UX, Microsoft Windows NT/2000/XP, and Linux platforms.

About Nassda

Nassda Corporation is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, mixed signal, memory, system-on-chip and high performance digital designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com.

The specific features, functionality, and release timing of any new products or tools described in this press release remain at the sole discretion of Nassda Corporation and Nassda does not make any warranty as to when or if such specific features, functionality or release may occur.

NOTE: Nassda and HSIM are registered trademarks and HANEX is a trademark of Nassda Corporation. All other trademarks and registered trademarks are the property of their respective owners.




--------------------------------------------------------------------------------
Source: Nassda Corporation

[panik]

Aeroflex Microelectronic Solutions Adopts Nassda`s HSIM for Full-Chip Verification
Tuesday May 13, 4:00 pm ET
HSIM Enables Aeroflex to Achieve First Pass Success and Simulate Silicon-Accurate Performance of Its Memory and Mixed-Signal Designs


SANTA CLARA, Calif., May 13 /PRNewswire-FirstCall/ -- Nassda(TM) Corporation (Nasdaq: NSDA - News) today announced that Aeroflex Microelectronic Solutions, Colorado Springs, an Aeroflex Incorporated company (Nasdaq: ARXX - News), has adopted Nassda`s HSIM(TM) full-chip simulator and analysis tool for verification of memories and complex mixed-signal designs in Aeroflex`s high-reliability integrated circuit (IC) families for the aerospace and defense markets.

Aeroflex engineers have already applied HSIM in prelayout and postlayout verification of one 0.18-micron CMOS memory design, one 0.35-micron memory, and two 0.25-micron CMOS mixed-signal designs. The memory designs included a 128Kx32 radiation-hardened SRAM memory with 60M transistors and a radiation-hardened 32Kx8 PROM with 600K transistors. The mixed-signal designs included a Low-Voltage Differential Signaling (LVDS) serializer and an LVDS deserializer, each containing a phase-lock loop (PLL). The LVDS serializer and deserializer parts, each with three serial channels running at 525Mbps, are radiation-hardened for space applications.

In the past, engineers needed to break large designs like memories into smaller blocks to meet capacity restrictions of earlier circuit simulators -- a process that exposed these designs to errors in timing or logic between the blocks. For PLL designs, traditional circuit simulators have required very long analysis times, often running into weeks, until the simulated PLL circuitry would achieve lock with the reference clock.

"With HSIM, we were able to simulate the 60M transistor memory design in 18 hours with full parasitics, and in only 15 minutes with acceptable timing accuracy using HSIM parasitic reduction techniques. For our Serdes PLL, we reduced our simulation time from 40 hours to less than 4 hours with no convergence problems," said Vern Schnathorst, standard product design manager at Aeroflex. "We achieved first pass success and the silicon circuit performance matches the performance predicted in simulation very closely."

Because HSIM uses the same netlist as earlier tools, Aeroflex was able to easily insert HSIM into its existing design flow. As designers complete their individual blocks, they combine them and simulate them in full-chip simulation runs with HSIM. HSIM`s hierarchical full-chip circuit simulation capabilities enable rapid execution of complete designs with SPICE-level accuracy.

"Whether they are for mission-critical markets or competitive commercial markets, today`s advanced designs require comprehensive, full-chip verification to eliminate potential faults and avoid silicon re-spins," said Sang Wang, CEO of Nassda. "We`re pleased to be working closely with Aeroflex in meeting its needs for accurate, high-performance, and full-chip transistor-level verification of its leading-edge designs."

About HSIM

HSIM provides detailed circuit-level analysis of timing and power behavior and signal integrity effects. It solves the critical issue of analyzing circuit behavior while taking into account the electrical and parasitic effects of nanometer-scale silicon. It is ideal for demanding analog, memory, mixed-signal and system-on-chip designs.

About Aeroflex

Aeroflex Microelectronic Solutions, Colorado Springs division, provides integrated circuits and circuit card assemblies for the aerospace, commercial, communication and industrial markets. Aeroflex Incorporated is a global provider of high technology solutions to the aerospace, defense and broadband communication markets. The Company`s diverse technologies allow it to design, develop, manufacture and market a broad range of test, measurement and microelectronic products. The Company`s common stock trades on the Nasdaq National Market System under the symbol ARXX and is included in the S&P SmallCap 600 index. Additional information concerning Aeroflex Incorporated can be found on the Company`s Web site: www.aeroflex.com.

About Nassda

Nassda Corporation is a fast-growing provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, mixed signal, memory, system-on-chip and high performance digital designs. Nassda`s products enable first silicon success, and improve product quality and production yield for its consumer, communication, computer, and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at www.nassda.com.

NOTE: Nassda and HSIM are registered trademarks of Nassda Corporation. All other trademarks and registered trademarks are the property of their owners.




--------------------------------------------------------------------------------
Source: Nassda Corporation

[Chipdesign]

http://www.e-insite.net/ednmag/index.asp?layout=article&arti…
Timing analyzer is always a critic


By Gabe Moretti -- EDN, 3/20/2003


Most design teams currently rely on static-timing analysis to ensure timing closure for their designs. Yet, many of the effects that impact signal propagation are dynamic or result from dynamic behavior. To ensure that a circuit works, static-timing models must be pessimistic, so that the static-timing-analysis tools cover the dynamic behavior. This approach often results in safe and conservative but not optimal implementations. Once designers use 130-nm or smaller process technologies, such approximations become unacceptable. You instead have to use some form of dynamic analysis. Although transistor-level tools, such as Spice and its fast-Spice variants, have been around for years, the new designs` sizes exceed the computing capabilities of these tools.

To address this problem Nassda has released Critic, a full-chip critical timing analyzer for postlayout verification of cell-based digital ICs, including their associated clock networks. The product complements static-timing-analysis-verification methods. For analysis of the system clock, Critic automatically identifies the clock net from the device pins, back-annotates the clock net with interconnect RC parasitics, and sets control signals to sensitize the clock paths. The tool then simulates the clock nets with the Spice model for each cell, including precise fan-out loading. Finally, it compares the clock-pin delays with those that a static-analysis tool reports. Critic also automatically analyzes critical paths that the chip designer chooses, usually from a report that the static-timing tool generates.

After a designer invokes analysis, Critic automatically handles the subsequent steps, including back-annotation of postlayout parasitics, which can dramatically affect the timing of critical paths in nanometer designs. Additionally, Critic can automatically include secondary loads to these paths to account for capacitance and other loading effects. After analyzing the design, Critic tests the side-branch values to enable or sensitize the critical paths and creates input patterns for dynamic simulation of the paths.

Unlike approaches that require a Spice simulation run for each path to be analyzed, Critic simultaneously simulates all paths, reducing the number of simulation licenses you need for analysis. During this simulation, Critic uses the Spice model for each cell in each simulated path. Finally, Critic compares the path delays with those reported by a static-analysis tool and provides the designer with a detailed report on timing differences between those results and Critic`s results. Using this data, designers can fix timing problems and selectively optimize signal or clock nets for maximum performance.

The tool runs on Sun Solaris, HP-UX, Windows XP/NT/2000, and Linux platforms. The price for a time-based license starts at $65,000.

Nassda Corp, 1-408-562-9168, www.nassda.com.

[Chipdesign]

http://www.eet.com/in_focus/silicon_engineering/OEG20030428S…


Enhanced verification vital for embedded memory design

By Graham Bell, Director of Marketing, Nassda Corp., Santa Clara, Calif.

EE Times
April 28, 2003 (4:39 p.m. ET)



Increasing data throughput requirements continue to boost demand for more memory in highly integrated products. In applications ranging from DVD players to cellular phones and personal ID cards, designers are required to integrate greater numbers of larger embedded memory arrays to support diverse data and code storage needs.

Driven by these applications, embedded memory will account for about 70 percent of SoC content by 2005, according to Dataquest. As embedded memory`s role expands in highly competitive markets, however, designers face growing pressure to achieve working-first silicon more quickly and with less effort. Caught between growing device complexity and continued price pressure, leading semiconductor companies are turning to enhanced verification methods to avoid costly respins and speed delivery of SoCs for memory-intensive applications.

In the past, memory designers could safely rely on the assumption that individual memory arrays faced similar operating conditions, permitting them to apply verification results from simulation of only one instance to all other instances. As memory usage absorbs an increased share of SoC area, however, individual memory blocks are becoming more diverse in size, organization and performance.

Advanced SoCs can comprise dozens, even hundreds, of memory arrays, each occupying a specific location and orientation with specific routing and power connections that place it in a unique dynamic operating environment. As a result, each instance in such a design needs to be characterized separately and accurately across a range of process, voltage, and temperature conditions to ensure correct performance.

At the same time, characterization and analysis has become decidedly more involved as the industry moves to nanometer technologies at 130-nm and below. At nanometer geometries, effects like capacitive coupling of densely routed interconnect dramatically impacts signal timing. As a result, semiconductor manufacturers find that designs that seem to pass sign-off using traditional analysis tools fail in silicon, dictating a need for more detailed circuit-level analysis to uncover nanometer-timing problems.

However, with today`s large, complex design blocks, traditional circuit simulation tools have reached the limits of their speed and capacity, forcing designers to extrapolate overall design performance from a limited analysis of individual subnets or critical paths. In nanometer designs, however, cross-coupling interactions among different nets dramatically impact timing, and critical-path analysis methods prove inadequate in practice.

This leads to chip timing problems with reduced operating performance and even outright failure of the design. To compensate, engineers incorporate larger timing margins in their designs to try to guarantee functionality, resulting in expensive over-design, and delayed production and profit.

To address these growing verification challenges, leading design organizations are turning to more advanced methods including hierarchical verification, analog behavioral modeling and mixed-level co-simulation. Hierarchical simulation methods exploit the regular structure of memory arrays, verifying repeated cells just once but yielding instance-specific results - providing significantly faster run times with no loss in accuracy.

In a recent embedded memory design, verification runs that required 3-4 hours to complete for a flat representation of a key block needed only 40 minutes to complete using a hierarchical representation of the same block. With this rapid turnaround time, engineers were able to run simulations and edit their design several times within a single day rather than deal with more protracted, day-long edit cycles. Similarly, post-layout verification runs dropped from days to just hours, permitting practical analysis of post-layout crosstalk, IR voltage drop and ground-bounce effects despite the large amounts of parasitic data associated with these designs.

Increasing integration of digital and analog/mixed-signal circuitry requires even more sophisticated methods for analyzing performance of the complete design. Using analog behavioral models written in Verilog-A, designers can create test devices or checkers that monitor signal conditions such as frequency, timing and voltage level to ensure they stay within desired operating conditions.

If incorrect circuit behavior is detected, the simulation can be stopped and the event logged for later debug analysis. This early detection can save valuable verification resources by not continuing simulations that have erroneous results. By combining analog behavioral models with detailed circuit-level analysis, engineers can more easily identify potential design problems that would have been difficult or impossible to detect with conventional verification methods.


Digital co-simulation useful


Similarly, digital co-simulation methods have become more important as designers combine memory and digital logic in integrated designs. With co-simulation, a digital simulator analyzes the digital portion of a design while a circuit-level simulator provides more detailed analysis of selected portions. As a result, designers can simulate larger circuits more quickly than possible with pure circuit-level simulation methods. Of course, co-simulation trades off overall accuracy for overall speed, limiting circuit-level analysis to specific blocks of interest, while using more abstract digital representations to speed simulation of others. Nevertheless, this approach provides an effective alternative for very large designs that are dominated by digital logic but still require circuit-level accuracy for some blocks.

In a typical co-simulation flow in an embedded memory design, engineers can selectively simulate the decoder, memory core or the control logic at the transistor level, while simulating the remainder of the overall design as digital blocks in Verilog. In a recent SRAM design, for example, designers simulated the decoder at the circuit-level using Nassda`s HSIM circuit simulator, while simulating the memory core and control logic in a Verilog simulator. In this case, designers simulated several thousand read and write operations on the complete circuit of about 1.7 million MOSFETs.

When this SRAM design was completely simulated at the circuit-level with HSIM, the simulation took 24.6 hours. In a co-simulation run, the design team used circuit-level HSIM simulation for only the decoder and simulated the remainder of the circuit in Verilog. In this case, the co-simulation of the complete design took 4.76 hours.


In providing results 5x faster than pure circuit-level simulation, co-simulation helps designers focus more quickly on potential problems in complex designs. Although co-simulation cannot match the overall accuracy of pure circuit-level simulation, it does provide full accuracy for the particular blocks of interest, such as the address decoder in the SRAM design example. Circuit-level effects such as IR voltage drop in the power network, for which nanometer designs are particularly sensitive, would still require full-chip post-layout analysis for final verification of the design.

As designers combine memory, digital logic and analog circuitry in more complex devices, advanced verification methods play an increasingly vital role in achieving early silicon success. Already in use at leading semiconductor companies, methods like hierarchical verification, analog behavioral modeling and digital co-simulation are becoming more accessible throughout the engineering community thanks to the growing availability of more sophisticated verification tools. Using these more advanced verification tools, engineers can identify the impact of nanometer effects on timing and accurately characterize the performance of diverse embedded memory blocks in larger integrated devices.

[Chipdesign]

http://www.eedesign.com/story/OEG20030505S0062?layout=articl…


Timing tool is both static and dynamic
By Richard Goering

EE Times
May 5, 2003 (12:01 p.m. EST)


Santa Cruz, Calif. - Claiming the first hybrid approach to transistor-level timing and crosstalk analysis, Nassda Corp. this week will introduce Hanex, a product that combines static and dynamic analysis techniques. Aimed at full-custom design, Hanex finds critical paths in combinational, sequential and dynamic logic.

Many designers have embraced static rather than dynamic timing analysis, which offers fast and exhaustive verification without test vectors. But as designs go below 130 nanometers, dynamic effects such as crosstalk aren`t accurately verified with static analysis only, said Graham Bell, director of marketing at Nassda.

Hanex simulates an entire critical path simultaneously, considering voltage-dependent capacitance, Miller capacitance and nonlinear input slopes. It verifies setup-and-hold timing for sequential logic, using dynamic techniques to account for crosstalk effects, Nassda said. It also simulates clock nets dynamically.

"From the 10,000-foot view, it`s a static timing analyzer that`s been enhanced with dynamic methods," Bell said. "But from the user`s point of view, it`s a fast timing analyzer that doesn`t require vectors."

Hanex finds and reports the longest path, and shows the incremental delays that travel down it. It reports absolute delay, and if the user selects timing checks, reports minimum and maximum setup and hold. It can also produce a Spice netlist for the critical path. An optional crosstalk analysis uses dynamic simulation on grounding capacitors. A concurrent signal-propagation capability analyzes the impact of neighboring nets on circuit performance.

Accuracy is "better than traditional static timing analysis," said product-marketing manager Joy Han, and within 2 percent of Spice simulation.

Designed for integration into existing IC design flows, Hanex supports a variety of device models and Spice netlist formats. It will be available in June, starting at $72,000, on Unix, Linux and Windows platforms.

http://www.eet.com/

[Chipdesign]

http://www.deepchip.com/items/snug03-22.html


Subject: NanoSim, Nassda HSIM, Avanti HSPICE, Cadence Spectre, Mentor Eldo

YIN & YANG: The other place where Cadence is facing serious competition is
in SPICE. This time, Gary`s numbers show it, too.

Dataquest FY 2001 SPICE Market (in $ Millions)

Synopsys/Avanti HSPICE ########### $22.5 (38%)
Nassda HSIM ########## $20.7 (35%)
Cadence ###### $11.2 (19%)
others ## $4.7 (8%)

But Cadence`s Spectre is still the 800 lbs gorilla in the analog simulation
market, though.

Dataquest FY 2001 Analog Simulation Market (in $ Millions)

Cadence Spectre ##################### $41.7 (80%)
Avanti Analogy Saber #### $8.6 (16%)
Mentor Anacad Eldo # $2.1 (4%)

NanoSim is Synopsys` new answer to Nassda`s HSPICE. From the user comments,
it doesn`t look like Nassda is going to be disappearing any time soon.


"Cadence`s Analog Artist is SUCKY, and it lies. What`s new?"

- Bob Pease of National Semiconductor


"Nassda HSIM is best vs. NanoSim. Avanti HSPICE is still the best vs.
Cadence Spectre or Eldo. EPIC should be abandoned. No experience
with Cosmos."

- Tie Li of Applause Technolgy


"Nassda`s HSIM rocks. It`s Avanti HSPICE compatible. We use both with
very little manipulation. Our HSPICE netlist reads straight into HSIM.
We use HSPICE for the every day simulation, HSIM for the full
chip/memory simulations. It is a nice fit.

Eldo is a joke. No experience on Spectre. NanoSim is awkward to use."

- Dave La Rosa of Microchip Technology


"NanoSim is an evolution of the old Epic tools with a nice interface to
the digital simulators. NanoSim will be merged with StarSim-XT (HSPICE
on steroids) to provide the accuracy, speed, and efficiency of HSPICE
with the nice NanoSim interface (at least that is the marketing plan!).
If they pull it through, it should be an awesome product.

No experience with Cadence. Limited use of Eldo. HSPICE rules.
Foundry models are easy to get.

Cosmos is just a joke. This is so that Avanti can claim `one stop
shopping`. Cadence Analog Artist rules! It is truly integrated and
very mature. Cosmos is still under development and has not gained
any momentum."

- Roberto Landrau of Mitre


"12:00 - 12:45 - Top-Down Design of a Mixed-Signal Power Converter IC

How to use Saber in designing this IC. They use Mentor Modelsim as
Verilog simulator, and Synopsys Saber for analog. They used heavily
some capabilities of Saber to modify parameters of their analog
testbench during run time.

Q. How is the digital/analog teams methodology? Do they all use this
one?
A. They have independent methodologies
Q. What`s the main issue you run into with this integration
verification methodology?
A. Suprisingly very few issues. Probably the main one was setting up
the hypermodels."

- Santiago Fernandez-Gomez of Pixim, Inc.


"Avanti HSPICE is the tool of choice here with some Celerity thrown in."

- Bob Lawrence of Agere Systems


"I do occasionally use Avanti HSPICE. I know one of our suppliers uses
Eldo, but I don`t know the basis for their selection, and I`ve never
compared the two. I haven`t used any of the other tools."

- [ An Anon Engineer ]


"Anyway, our group performs heavy-duty transient analysis in the course
of our design. To improve our design cycle, I worked on an analog
circuit simulator eval in the second half of 2002. We compared
Cadence Spectre, Mentor Eldo, and Avanti HSPICE. Spectre`s showing was
so poor, it did not warrant first-class treatment in our final customer
presentation:

Circuit Type MOSFETs HSPICE Eldo
--------------------- ------- ------ -----
Charge Pump 1 k 1x 0.4x
Full chip sim 25 k 1x 0.4x
Full chip sim 25 k 1x 3.6x
Full chip behavioral 20 k 1x 4.1x
Sensing 3 k 1x 2.5x
ADC 1 k 1x 2.6x
Full chip performance 70 k 1x 3.0x
Setup and Hold 5 k 1x 1.3x

Eldo averaged 2.2x and was typically 3x faster than HSPICE."

- [ An Anon Engineer ]


"Celestry seems to have a slight advantage. For SPICE it`s the same
thing, where Spectre is the prefered simulator.

Cosmos versus Virtuoso: Cosmos needs a few more years. It`s still
the kid brother."

- Bengt-Erik Embretsen of Zarlink Semiconductor


"Cadence Celestry is a smart delay calculator. The advantage of
Celestry is that this tool recognizes the mesh structure for clocks in
which there are parallel buffers. PrimeTime delay calculator does not
recognize the parallel buffers therefore the relevant interconnect
delay are zero. Same things occur in the Cadence Celtic IC which also
does not recognize the parallel buffer structure therefore puts out
zero interconnect delay. Designers can be easily fooled by the result
from PrimeTime and Celtic IC.

Since 0.18 um technology, a lot of the antenna violations are fixed by
inserting antenna cells in the P&R phase. Because the antenna cell
timing libraries (.db and .lib) are not furnished by library provider
(ex. Artisan), it can be easily overlooked during delay calculation.
The PrimeTime delay calculator will report zero interconnect delay if
that particular wire has antenna cells connected to it. Designers can
be easily fooled by the result. On the other hand, if the antenna
cell`s .lib is missing then the Cadence Celestry will report a huge
delay on that particular net with antenna fixes. At least, the tool
provides an alarm system."

- Hui-Hwa Chiang of Cirrus


"Forget about Mach-TA and Celestry. We think Nassda HSIM is better than
Synopsys NanoSim, expecially if you have real analog parts in the
design. In Philips we use Spectre from Cadence simply because our
transistor models are only supported on this one. I believe that all
the *mill tools are outdated, since most of the EPIC development
team have left Synopsys to go to create Nassda. (Perhaps I am wrong
here.) We have not used Powermill for a long time now and indeed have
dropped our license for cost reduction !!!"

- Philippe Duquennois of Philips


"Nassda HSIM is fast, and worked on our design. NanoSim didn`t. I like
HSPICE`s price, Spectre`s convergence, and Eldo`s usability. We
currently use Avanti HSPICE.

We use Analog Artist, but Cosmos looks good. I really like Aptivia,
the recent purchase of Antrim by Cadence. It`s a very good analog sim
cockpit. It removes the need for 90% of the scripts designers used to
write for Analog Artist."

- [ An Anon Engineer ]


"Avanti HSPICE is the standard. Why change a good thing?"

- [ An Anon Engineer ]


"NanoSim again has the advantage of direct integration with VCS to make
mixed-signal sim faster and easier. Nassda HSIM is not bad technology,
but Synopsys again has better business model."

- Wilson Chan of Qualcomm


"I think the only real players are Synopsys and Nassda. I would probably
give the edge to Synopsys between the two only because we have more
experience there and we already have/use other Synopsys tools in the
flow so we are better integrated, but beyond that you could probably
flip a coin.

In the device level simulation space, the players are Avanti HSPICE and
Cadence Spectre. For our world, Spectre is used heavily because of
better integration with the Cadence environment that we use for layout
and schematic capture. HSPICE is widely used in the industry so we need
to maintain support for it. I think both are fairly interchangeable.

As far as Eldo is concerned, I think the only people who use it (and
like it) are `Europe first` types."

- Terry Lowe of IBM Microelectronics


"Avanti HSPICE gives a very mature and well documented appearence. The
same goes for Cadence Spectre except the documentation. Perhaps I
simply missed the right documentations in the tons of Cadence binaries?"

- [ An Anon Engineer ]


"NanoSim has evolved pretty heavily since I used it in its past life as
Timemill. There have been many improvements such as the direct model
calibration, interface to VCS for full mixed mode sims, the user GUI,
Verilog-A support, and improved algorithms. Their Verilog-A seems to
have still quite a few incompatibilities with other tools that I have
used and am currently using. Overall it has been a very reliable tool.

MachTA is kind of in a neck to neck race w/ NanoSim and has additional
support for VHDL mixed mode as well as full donut hole partitioning.
They have a pretty advanced GUI as well, but it has always taken me
much longer to get up and running with MachTA on a big job, as well as
tuning settings for accuracy to produce results similar to a SPICE
engine. It is a very capable simulator as well, but the initial setup
can be a bear.

As far as speed, they both do very well on full digital circuits but
with analog circuitry including current sources and diff pairs, both
are not that much faster than a Spectre or HSPICE."

- Milam Paraschou of Micron


"I have only used NanoSim and Mentor MachTA. MachTA has gotten better
but I still think that NanoSim seems more polished. As a circuit
designer, I usually need more accuracy than speed and NanoSim has a
way of designating accuracy but still speeds up the other parts of
top level simulations that makes it very useful. Avanti HSPICE and
Cadence Spectre seem to have similar accuracy and usually have results
that correspond well. Spectre has issues with accepting other inputs
like SPICE netlists. Mentor Eldo does not correspond as well and is
not used as much because of accuracy questions.

The Synopsys EPIC RailMill tool is hard to run. It needs an expert
user to get any results that are useful. Cadence Analog Artist does
not seem to be easy to script for repeatable characterizations. I have
never used Avanti Cosmos."

- Amanda Reddy of Micron


"I am using AstroRail for power analysis purposes. The results are
questionable, minor changes in input parameters, changes the results
in a very unexpected way. We don`t trust the results of the tool.

No support for the AstroRail in Israel - remote support is very hard
to relay on (due to time differences).

Tool not debugged - we discovered many bugs that made the impression
that no sufficient QA was made for the tool before releasing versions.

Long simulation durations (more than one day), large memory consumption
(more than 21 Gig for some cases)."

- Efrat Ilia of Intel


"We did evaluate AstroRail with success. We managed to correlate
simulations with power measurements taken from production silicon.
As a result we gained enough confidence to alter our power routing on
future projects to be less conservative and saved 10% die size. We
also used statisical power estimates and again this correlated with
expected data reasonably well. If nothing else AstroRail provides a
great way of ensuring you routed the power network correctly."

- Craig Farnsworth of Cogency Semiconductors

[Chipdesign]

Concept Engineering and Nassda Improve Debug Of High-Performance Digital Designs
Tuesday May 27, 8:09 am ET
Nassda Offers Concept`s Visualization Technology Through OEM Agreement


FREIBURG, Germany--(BUSINESS WIRE)--May 27, 2003--Concept Engineering, the industry leader in automatic schematic generation and viewing technology, today announced that its visualization technology, SpiceVision PRO, has been integrated with the CRITIC and HANEX digital circuit analysis software from Nassda Corp. (Nasdaq:NSDA - News).
Nassda will sell a version of SpiceVision PRO directly to its customers under the terms of a comprehensive original equipment manufacturer (OEM) agreement. First product presentations will be given in Booth 2250 at the Design Automation Conference (DAC) in Anaheim, Calif., June 2-6, 2003.

Concept Engineering`s SpiceVision PRO enables designers of high-performance digital circuits to visualize critical paths and clock networks analyzed by Nassda software. This visualization technology improves productivity by allowing designers to easily understand the impact of their design decisions on the timing behavior of critical paths.

"Concept Engineering`s visualization technology provides the speed, capacity, and ease-of-use that we were seeking for our digital timing analysis solutions," said Nassda CEO Sang Wang. "SpiceVision PRO`s interactivity, efficient database, and fast speed combined with Nassda`s high-performance timing analyzers will allow designers to accurately visualize analysis output and quickly debug critical paths in their designs."

"Nassda has high standards for circuit capacity and execution speed for the full-chip verification of complex ICs," said Gerhard Angst, president and CEO of Concept Engineering. "We invested considerable resources to develop advanced technology for the visualization of complex transistor-level and gate-level circuit structures, and are very pleased that Nassda has chosen to integrate our technology into its products. We`ve seen an overwhelming acceptance of our SpiceVision product family and we are glad that we can work with Nassda to improve debug of high-performance digital designs."

SpiceVision PRO produces clean, easy-to-read transistor-level schematics from complex SPICE descriptions, helps engineers visualize the parasitic effects within complex nanometer designs, and reduces the design and debug time for engineers who work at the SPICE netlist level. Using Concept Engineering`s transistor-level schematic engine, SpiceVision PRO generates schematics from pure SPICE connectivity information.

About Nassda

Nassda Corp. (Nasdaq:NSDA - News) is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. With headquarters in Santa Clara, Calif., the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, high-performance digital and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, visit the company`s Web site at http://www.nassda.com.

About Concept Engineering

Concept Engineering, a privately held company based in Freiburg, Germany, was founded in 1990 to develop and market innovative schematic generation and viewing technology for use with logic synthesis, verification, test automation and physical design tools. The company`s customers are primarily original equipment EDA tool manufacturers (OEMs), in-house CAD tool developers and semiconductor companies. For more information, see http://www.concept.de.

Nassda is a registered trademark of Nassda Corp. SpiceVision PRO is a trademark of Concept Engineering. All other trademarks and registered trademarks are the property of their respective owners.



--------------------------------------------------------------------------------
Contact:
Concept Engineering
Gerhard Angst, [phone]
[e-mail]
or
Cayenne Communication
Michelle Clancy, 252/940-0981
[e-mail]



--------------------------------------------------------------------------------
Source: Concept Engineering

[panik]

Nassda Announces Revenue of $7.5 Million for the Quarter Ended June 30, 2003 Net Income of $196,000, or $0.01 per Diluted Share
Wednesday July 16, 4:04 pm ET


SANTA CLARA, Calif., July 16 /PRNewswire-FirstCall/ -- Nassda Corporation (Nasdaq: NSDA - News), a leading provider of full-chip circuit simulation and analysis software for the design and verification of complex semiconductors, today announced financial results for the quarter ended June 30, 2003, the third quarter of Nassda`s fiscal 2003. Revenue for the quarter ended June 30, 2003 was $7.5 million, a decrease of $1.4 million from $8.9 million for the quarter ended June 30, 2002 and a decrease of $1.3 million from $8.8 million for the quarter ended March 31, 2003.
ADVERTISEMENT


Net income for the quarter ended June 30, 2003 was $196,000, or $0.01 per diluted share, a decrease from $1.8 million, or $0.06 per diluted share, for the quarter ended June 30, 2002 and a decrease from $1.0 million, or $0.04 per diluted share, for the quarter ended March 31, 2003.

For the nine months ended June 30, 2003, revenue was $26.6 million, an 11% increase from $24.0 million for the nine months ended June 30, 2002. Net income for the nine months ended June 30, 2003 was $3.2 million, or $0.11 per diluted share, a decrease from $4.2 million, or $0.15 per diluted share, for the nine months ended June 30, 2002.

"With an extremely focused Nassda team, we were able to achieve our bookings, revenue and breakeven goals for the quarter and added more than 10 new customers to pass the 200 customers mark worldwide," said Sang Wang, Chief Executive Officer. "Additionally, our cash, cash equivalents and short-term investments increased by approximately $3.9 million during the quarter and totaled $88.9 million as of June 30, 2003. On the R&D front, we delivered HSIM release 3.0 and introduced our fourth product, HANEX(TM) during the quarter. We intend to remain focused and continue to execute our long-term strategies of providing next-generation nanometer solutions to our customers."

Business Outlook

We believe our customers` spending pattern will not change meaningfully for the balance of fiscal 2003. As a result, we expect revenue of approximately $8.0 million and fully diluted earnings per share of approximately $0.00 to $0.01 for the quarter ending September 30, 2003. For fiscal 2003, we expect revenue of approximately $34.5 million to $34.7 million and net income of approximately $0.11 to $0.12 per fully diluted share.

Nassda will hold a conference call that includes a discussion of our business outlook with financial analysts and investors at 2:00 p.m. PDT today. A live webcast of the call will be available on Nassda`s web site at http://www.nassda.com or http://www.companyboardroom.com. Following completion of the call, a rebroadcast of the webcast will be available at http://www.nassda.com or http://www.companyboardroom.com through July 23, 2003. Those without internet access may listen to a replay of the call by dialing [phone], access code 648575. The replay will be available from 5:00 p.m. PDT on July 16, 2003 through July 23, 2003.

About Nassda

Nassda Corporation is a leading provider of full-chip circuit verification software for complex nanometer semiconductors. Headquartered in Santa Clara, California, the company develops and markets simulation and analysis solutions for advanced ICs, especially for analog, memory, high-performance digital and mixed-signal SoC designs. Nassda`s products enable first silicon success and improve product quality and production yield for its consumer, communication, computer and memory customers. The company has sales and distribution offices throughout the world. For more information about Nassda, please visit the company`s website at http://www.nassda.com .

Forward Looking Statements

This press release contains forward-looking statements regarding the visibility of future revenue and diluted earnings per share and acceptance of new products that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation, future performance being dependent on: availability of customer budgets for Nassda`s products, Nassda`s product development schedules, the design performance of Nassda`s existing and new electronic design automation software and other tools, as well as customer`s adoption of Nassda`s products and those customer`s design and manufacturing schedules. In addition, continued reduced capital spending or delayed implementation of programs due to adverse general economic conditions and reduced demand for products containing complex nanometer-scale semiconductors may impact Nassda`s future performance. These risks, uncertainties and other factors may cause Nassda`s actual results, levels of activity, performance or achievements to differ materially from those expressed or implied by the forward-looking statements. In addition, historical information should not be considered a predictor of future performance. Neither Nassda nor any other person assumes responsibility for the accuracy and completeness of these forward-looking statements. Nassda disclaims any obligation to update information contained in any forward-looking statement.

For additional information and considerations regarding the risks faced by Nassda, see Nassda`s Annual Report on Form 10-K for the fiscal year ended September 30, 2002 and Quarterly Reports on Form 10-Q for the quarter ended March 31, 2003, as filed with the Securities and Exchange Commission.

NOTE: Nassda and HSIM are registered trademarks of Nassda Corporation.

Nassda Corporation
Condensed Consolidated Balance Sheets
(in thousands)

June 30, September 30,
2003 2002
(unaudited)

ASSETS

Current assets:
Cash, cash equivalents and
short-term investments $88,859 $78,452
Accounts receivable, net of allowance 2,944 4,156
Prepaid expenses and other current assets 1,125 553
Deferred income taxes 2,716 2,050
Total current assets 95,644 85,211
Property and equipment, net 836 784
Other assets 916 727
Total assets $97,396 $86,722

LIABILITIES AND STOCKHOLDERS` EQUITY
Current liabilities:
Accounts payable $575 $555
Accrued compensation 2,530 4,130
Accrued liabilities 2,023 1,982
Income taxes payable 1,477 882
Deferred revenue 9,061 6,065
Total current liabilities 15,666 13,614

Deferred revenue 960 --
Other long-term liabilities 44 54
Total liabilities 16,670 13,668

Stockholders` equity:
Common stock 26 25
Additional paid-in capital 69,939 66,378
Deferred stock-based compensation (1,346) (2,208)
Accumulated other comprehensive income 13 6
Retained earnings 12,094 8,853
Total stockholders` equity 80,726 73,054
Total liabilities and stockholders` equity $97,396 $86,722


Nassda Corporation
Unaudited Consolidated Income Statements
(in thousands, except per share data)

Three Months Ended Nine Months Ended
June 30, June 30,
2003 2002 2003 2002

Revenue
Product $1,892 $4,999 $9,735 $13,920
Subscription 3,558 2,622 10,749 6,662
Maintenance 2,058 1,301 6,158 3,453
Total revenue 7,508 8,922 26,642 24,035

Cost of revenue
Cost of product revenue 69 22 198 157
Cost of subscription revenue 90 74 260 191
Cost of maintenance revenue 211 174 609 487
Total cost of revenue 370 270 1,067 835

Gross Profit 7,138 8,652 25,575 23,200

Operating expenses:
Research and development 1,968 1,248 5,203 3,833
Sales and marketing 2,659 2,424 8,408 6,834
General and administrative 2,457 2,085 7,335 5,607
Stock-based compensation 229 252 725 756
7,313 6,009 21,671 17,030

Income (loss) from operations (175) 2,643 3,904 6,170

Other income, net 233 319 727 649

Income before income taxes 58 2,962 4,631 6,819

Income tax benefit (provision) 138 (1,133) (1,390) (2,577)

Net income $196 $1,829 $3,241 $4,242

Earnings per share:
Basic $0.01 $0.08 $0.13 $0.22
Diluted $0.01 $0.06 $0.11 $0.15

Shares used in computing
earning per share:
Basic 25,326 22,962 24,859 18,922
Diluted 28,546 29,375 28,652 27,432




--------------------------------------------------------------------------------
Source: Nassda Corporation