TSMC and Cadence Collaborate to Deliver AI-Driven Advanced-Node Design Flows, Silicon-Proven IP and 3D-IC Solutions
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it is collaborating with TSMC to enhance productivity and optimize product performance for AI-driven advanced-node designs and 3D-ICs. The rapid adoption of AI applications has created unprecedented demand for advanced silicon solutions capable of handling colossal datasets and computations. To meet these escalating requirements, the industry is pushing the boundaries of advanced-node silicon and 3D-IC technologies. TSMC and Cadence are at the forefront of this revolution, together empowering customers to accelerate time to market while increasing performance.
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Cadence is collaborating with TSMC to enhance productivity and optimize product performance for AI-driven advanced-node designs and 3D-ICs. The rapid adoption of AI applications has created unprecedented demand for advanced silicon solutions capable of handling colossal datasets and computations. TSMC and Cadence are together empowering customers to accelerate time to market while increasing performance. (Graphic: Business Wire)
TSMC has certified Cadence’s industry-leading digital and custom design flows for implementation and signoff on TSMC’s latest N3 and N2P process technologies. As long-standing design technology co-optimization (DTCO) partners, TSMC and Cadence continue that tradition by collaborating to optimize power, performance and area (PPA) on A16, adding EDA features to enable advanced features such as backside routing.
Cadence and TSMC are also collaborating on Cadence.AI to drive next-generation digital and analog design automation fueled by AI, delivering industry-leading productivity and quality of results. Cadence.AI is a chips-to-systems AI platform spanning all aspects of design and verification. The collaboration between TSMC and Cadence is focused on three main domains:
- The Cadence Cerebrus Intelligent Chip Explorer applies AI to digital design for converging on the optimal PPA.
- The Cadence Joint Enterprise Data and AI (JedAI) Platform uses generative AI for design debug and analytics, helping with PPA analysis.
- Cadence’s Virtuoso Studio enables migrating legacy custom and analog designs to modern nodes and performs circuit optimization and high-sigma Monte Carlo analysis.
The Cadence Integrity 3D-IC Platform is a leading system-level exploration solution and a single-vendor platform that unifies packaging, analog and digital implementation—making efficient 3D-IC design possible. This opens new opportunities for innovation by supporting all the latest 3Dblox features and constructs. To enable the ultra-high-density interconnect in TSMC 3DFabric technologies, TSMC and Cadence are collaborating on a next-generation high-capacity substrate router for die-to-die and die-to-substrate connections.