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     145  0 Kommentare MaxLinear announces the development of the Rushmore family of 200G/lane PAM4 Digital Signal Processors (DSP)

    MaxLinear, Inc., a leading provider of high-speed interconnect ICs enabling data center, metro, and wireless transport networks, today announced the development of its fourth generation 200G/lane PAM4 SERDES (Serializer/Deserializer) and DSP family, Rushmore. This new Samsung Foundry leading-edge-CMOS-based family delivers a significant leap in performance, power efficiency and density, enabling data center operators and cloud providers to address rapidly increasing data traffic demand, the transition to higher speed networks, and the critical power efficiency needs of AI/ML networks.

    This press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20240326662490/en/

    MaxLinear announces the development of the Rushmore family of 200G/lane PAM4 Digital Signal Processors (DSP)

    MaxLinear announces the development of the Rushmore family of 200G/lane PAM4 Digital Signal Processors (DSP)

    The Rushmore family encompasses a diverse array of variants tailored to meet the evolving needs of modern data centers and telecommunications networks. This includes support for fully re-timed optical modules, half re-timed optics, and active electrical cables (AECs). Moreover, MaxLinear is introducing both 8x200G-to-8x200G re-timers and 8x100G-to-4x200G gearbox variants, providing customers with a comprehensive suite of solutions to address their specific requirements.

    “The AI/ML revolution has accelerated the pace of innovation across the industry, and that is also the case at MaxLinear,” said Drew Guckenberger, Vice President of High Speed Interconnect at MaxLinear. “Starting from our highly successful Keystone 5nm 100G/lane DSP family, the amount of additional innovation that has gone into the new Rushmore 200G/lane DSP family is incredible. The impacts on power and performance our partners will see are expected to be significant for the industry as a whole as we scale into the new AI/ML world.”

    Building on the technical and commercial success of the Keystone family of 5nm 100G/lane DSPs, Rushmore doubles the data rates and significantly reduces latency for Big Data and AI/ML applications, while simultaneously adding significant additional functionality and performance extensions. The Rushmore family of DSP has been developed in conjunction with homegrown co-optimized SERDES to achieve overall best-in-class power and performance.

    "We are excited to collaborate closely with MaxLinear on this industry-leading achievement. Their proven expertise in high-speed interconnect solutions, combined with their strong development approach, made them an ideal partner for developing this next generation PAM4 SERDES IP and DSP using our most advanced manufacturing CMOS process technology,” said Marco Chisari, Executive Vice President and Head of US Foundry Business, Samsung Electronics. “This collaboration signifies our commitment to delivering cutting-edge solutions that empower our customers to build next-generation data center and high-performance computing applications."

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    MaxLinear announces the development of the Rushmore family of 200G/lane PAM4 Digital Signal Processors (DSP) MaxLinear, Inc., a leading provider of high-speed interconnect ICs enabling data center, metro, and wireless transport networks, today announced the development of its fourth generation 200G/lane PAM4 SERDES (Serializer/Deserializer) and DSP family, …