GSI Technology Announces Tape-Out of the Gemini-II APU

SUNNYVALE, Calif., Oct. 18, 2023 (GLOBE NEWSWIRE) -- GSI Technology, Inc. (Nasdaq: GSIT), developer of the Gemini Associative Processing Unit (APU) for AI and high-performance computing (HPC) and a leading provider of high-performance memory solutions for the networking, telecommunications, and military markets, today announced tape-out of the Gemini-II Associated Processing Unit, its second generation of the groundbreaking and patented compute-in-memory APU family, on TSMC’s 16nm process.

Gemini-II will bring significant performance enhancements over Gemini-I with more than ten times the processing performance with eight times the memory density compared to Gemini-I. These upgrades provide 184 TOPS (8bit adds) and more than 5.8 Peta OPS for Boolean operations at 1.4GHz operation. Gemini-II’s combination of high processing power, large built-in memory with tremendous bandwidth with reduced power consumption and latency provides a best-in-class solution for AI applications.

“This major achievement showcases our continued commitment to pushing the boundaries of AI chip technology,” said Lee-Lean Shu, CEO and Chairman of GSI Technology. “We're in talks with a leading Cloud Service Provider to further explore the APU architecture benefits highlighted by Gemini-II. Large language models, such as ChatGPT, Microsoft BING, and Google's Bard, are pushing natural language processing boundaries. We've just begun to tap into their transformative potential across many industries and applications. Abundant opportunities await Gemini-II and future APU implementations in the AI market.”

Gemini-II contains 1 million Bit Processors in six megabytes of associative compute memory tightly connected to 96 megabytes of distributed SRAM with a huge 46 terabyte per second bandwidth. The Gemini APU implements bit-granular processing, which allows users fully flexible cycle by cycle data format operation, an inherent advantage versus other parallel processors.

Gemini-II is a complete package that includes a DDR4 controller and external interfaces for PCIe Gen4 by 16, and PCIe Gen4 by 4. This integrated solution offers substantial processing capabilities, being suitable for both low power data center expansion and enabling data center functions at the edge. This empowers local execution of computationally intensive tasks, increasing the capabilities of edge applications like advanced driver assistance systems for automobiles, and HPC in delivery drones, autonomous robots, unmanned aerial vehicles, and satellites.