Silicon Graphics the Money Machine!!! - 500 Beiträge pro Seite

[jumanii]

Nobody knew it at the time, but the apex of the Internet rocket ride came on the morning of Dec. 9, 1999. Executives of computer maker VA Linux Systems Inc. gathered at 6 a.m. in the trading offices of Credit Suisse First Boston (CSR ) on the 17th floor of a San Francisco skyscraper for the company`s initial public offering. Among those assembled were Larry M. Augustin, the chief executive, and his friend Linus Torvalds, the inventor of the Linux operating system, who was dressed in his customary T-shirt and sandals. Their three toddlers scampered around underfoot while the adults watched in stunned silence as the stock price jumped from 30 a share to more than 200 within minutes. Augustin nudged Torvalds and whispered: "Did you ever think we`d be here?" At the end of trading, the company`s shares were worth 239.25 apiece, up 697.5%, making it the best-ever first-day IPO performance.

The person they had to thank for this heady experience was Frank Quattrone, then head of CSFB`s technology investment banking business. During more than two decades in Silicon Valley, the working-class kid from South Philadelphia had harnessed the forces of capital and innovation to create a money machine that showered the Valley with fabulous fortunes and helped drive productivity growth in the U.S. economy. Think of almost any household name in technology, from Amazon.com (AMZN ) Inc. to Cisco Systems Inc. (CSCO ), and Quattrone`s fingerprints were on it -- whether he helped the company raise venture capital, took it public, or advised its CEO on strategy.

Quattrone not only stood at the intersection of power and wealth in the high-tech economy but was also one of its chief architects. He put the deals together, controlled who got in, and helped hand out the bonanzas. He was both a powerbroker and a rainmaker -- a highly lucrative combination. Over the years, he led hundreds of IPOs and other financings, raising $65 billion for tech companies. But it was the tech stock boom that pumped his image up to near-mythic proportions. The ultracompetitive Quattrone and his team led 138 high-tech IPOs from 1998 to 2000, nearly as many as the next two -- Goldman Sachs & Co. (GS ) and Morgan Stanley (MWD ) -- combined, according to market researcher Dealogic.

Today, only the lawyers are getting rich. Frank Quattrone, 47, pale and puffy-eyed, occupies a chair at the defendant`s table in U.S. District Court in lower Manhattan, where his trial on federal obstruction-of-justice charges began on Sept. 29. Federal authorities charge that he interfered with an investigation into improper allocation of IPO shares by sending an e-mail to his employees on Dec. 5, 2000, urging them to purge unnecessary documents. He insists this was an innocent, routine reminder of company procedures. To drive home this point, Quattrone is expected to take the stand in his own defense. It`s a risky strategy. But Quattrone, whose powers of persuasion helped land scores of deals, is betting that the same personal touch will swing the jury to his side. If he`s convicted, legal experts say he could serve one or two years in jail.

Meanwhile, Quattrone faces a much broader inquest by the National Association of Securities Dealers into a whole range of alleged rules violations, including making improper IPO share allocations and offering potential clients favorable analysts` coverage -- charges he also denies. The NASD investigation was triggered by a tip about stock allocations that surfaced the day of Quattrone`s triumphant VA Linux IPO. Roger B. Sherman, the NASD`s senior vice-president for enforcement, testified at Quattrone`s trial. By the time this process is over, much of Quattrone`s professional life will have been laid bare -- and thoroughly picked over.

It makes for a remarkable and sobering tale. In a two-month investigation, BusinessWeek delved into Quattrone`s financial empire, turning up details on his web of interwoven dealings that underpinned the Internet economy -- and the greed that fueled them. Take Quattrone`s pay package. BusinessWeek has learned how Quattrone used his clout and connections to mint a personal fortune. Quattrone`s team reaped at least one-third of all the revenues they brought in above an annual quota, say three sources familiar with the arrangement. In 1999 alone, $600 million poured into Quattrone`s outpost, giving select participants in his group an estimated take of nearly $150 million. The next year, the team`s revenues jumped to $1.4 billion, says an ex-CSFBer, landing them an even fatter payday. Quattrone alone pocketed $200 million between 1998 and 2000, according to the NASD. Typically, at that time, top managing directors in investment banking took in $8 million to $10 million, according to estimates from Wall Street compensation tracker McLagan Partners Inc.

Interviews with more than three dozen Quattrone colleagues, business associates, and friends reveal how he pieced together his empire. With the blessing of his superiors, he supervised the managers of not just investment bankers but also stock analysts and brokers. He also had budgetary control of his group -- power enjoyed by virtually no other managers at CSFB. "The deal was almost like a joint venture, totally independent," says William L. Burnham, a former analyst who worked with Quattrone at CSFB.

That independence handed Quattrone more power and control than anyone else in tech banking. And he used it. His firm`s gifts of IPO shares to potential clients, which Quattrone`s defenders say were legal, were good for business. But the gifts drove a wedge between the interests of individuals and their companies. And the grand paychecks for his team made it possible for CSFB to attract top producers -- even though critics say they rewarded bankers for the sheer number of deals, regardless of quality.

TACTICS ON TRIAL. While it`s Quattrone who is facing justice in Manhattan, a wide swath of Silicon Valley stands trial as well. Quattrone`s banking tactics, many of which he pioneered, were adopted by other banks, ultimately becoming business-as-usual in the tech industry. This snowball effect helped create the market mania of the late 1990s and the resulting crash of NASDAQ stocks that cost investors more than $5 trillion. If Quattrone is found guilty, the high-tech capital of the world may face increased pressure to overhaul its tight-knit culture.

Even in the face of the market collapse, scandals, and greater regulatory scrutiny, Silicon Valley today clings to the system that made Quattrone the most powerful high-tech financier ever. It`s one that locks together the interests of venture capitalists, bankers, lawyers, and entrepreneurs, much like Japan`s keiretsu. This sharing of information and advice often improves the performance of companies and hastens innovations to market. Yet the system creates conflicts of interest. Even now, lawyers continue to take equity and sit on the boards of client companies. Banks still invest in startups they take public. And tech executives still get rich off the money they sink into their venture backer`s funds.

A whiff of reform is in the air. "Silicon Valley has to grow up. We can no longer think we`re this cute little outlaw place where we make our own rules," says William V. Campbell, chairman of software maker Intuit Inc. (INTU ) and adviser to startups. But in the offices and cozy lunch spots along U.S. highway 101, there`s also an impulse to let bygones be bygones, and to let Quattrone off the hook, too.

Quattrone can still count on an army of friends and former business associates to come to his defense. They contend he`s taking the fall for an ambiguous regulatory system that failed to restrain behavior that became commonplace as markets and investors stampeded out of control. His supporters include veteran venture capitalist C. Richard Kramlich, legendary high-tech investment banker Sanford R. Robertson, and entrepre- neur James Clark, a co-founder of Netscape Communications Corp., which Quattrone took public. "The whole thing is a bit of a witch hunt," says Clark. "Frank has been caught in the squeeze between people who make a mark by prosecuting people and the momentum of the times."

What drove Quattrone? He declined to comment for this story. But interviews with those who know him paint a picture of a man who started off with a noble mission: to help build Silicon Valley into an economic powerhouse. But when the markets crested so frothily, Quattrone rode the wave faster and farther than anybody else. He became less tied to the details of a deal -- and more focused on landing the deal. He was swept along by a confluence of driving ambition, the potential for untold riches, and the willingness of investors to devour whatever they were served.

[jumanii]

hoffen wir das frick SGI nicht entdeckt!

[Schapekop]

Nettes Artikelchen über Quattrone

aber was dies mit dem notoiren Cashburningmaschine Silicon Graphics zu tun???

[jumanii]

The formula clicked. He combined Morgan Stanley`s resources and stellar reputation with his own rainmaking skills to line up some of the most coveted IPOs of the time, including Silicon Graphics (SGI ), and Cisco Systems. With his star rising, he took over Morgan`s Global Technology group in 1991. Even though his responsibilities spanned the globe, in 1994 he was the first to put an investment banking office in the Valley, when he transplanted his from San Francisco to Menlo Park, Calif. -- within walking distance of the Valley`s venture-capital firms.

[lion37]

@jumannii

hi,
die kopie die, du hier eingestellt hast
hat aber auch garnichts mit der aktuellen
situation der SGI zu tun.
Vielleicht solltest du noch paar english vokabeln
pauken.

trotzdem
weiterhin viel spass, beim posten.
gruss
lion37

[jumanii]

#5

mit der aktuellen nicht!



intresant genug

Alias and WACOM Pair StudioTools Software and Cintiq Tablet for More Advanced Industrial Design
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Hardware Software Combination Furthers the Art of Digital Conceptualization


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[jumanii]

#5

den spaß werd ich haben!

[jumanii]

SGI global shared-memory architecture: Enabling system-wide shared memory

By Michael Woodacre
High-performance computing (HPC) users face the ever-increasing size and complexity of enormous data sets. They continually push the limits of the operating system by requiring larger numbers of CPUs, higher I/O bandwidth, and faster and more efficient parallel programming support. These requirements are changing the way OEMs design supercomputer systems – creating more efficient, cost-effective systems that must increasingly leverage embedded capabilities for specialized breakthrough functionality.

SGI meets these demands with technical compute servers and supercomputers based on its SGI NUMAflex cache-coherent, non-uniform memory architecture (SGI ccNUMA). A key enabler of NUMAflex is SGI NUMAlink interconnect technology, an embedded interconnect technology that dramatically reduces the time and resources required to run technical applications by managing extremely large data sets in a single, system-wide, shared-memory space called global shared memory.

In January of this year, SGI introduced SGI Altix 3000, a supercluster based on the unique NUMAflex system architecture used in SGI Origin 3000 systems. While Origin systems are based on the MIPS microprocessor and the IRIX operating system, the SGI Altix 3000 family combines NUMAflex with industry-standard components, such as the Intel Itanium 2 microprocessor and the Linux operating system.

With this embedded system interconnect, the Altix 3000 family enables new capabilities and time-to-solution breakthroughs that neither traditional Linux OS-based clusters nor competitive SMP architectures can tackle. The NUMAflex architecture allows the system to scale applications performance for up to 512 processors, all working together in a cache-coherent manner.

Global shared memory means that a single memory address space is visible to all system resources, including microprocessors and I/O, across all nodes. Systems with global shared memory allow access to all data in the system’s memory directly and extremely quickly, without having to go through I/O or networking bottlenecks. Systems with multiple nodes without global shared memory instead must pass copies of data, often in the form of messages, which can greatly complicate programming and slow down performance by significantly increasing the time processors must wait for data. Global shared memory requires a sophisticated system memory interconnect like NUMAlink.

NUMAflex architecture
NUMAflex uses an SGI NUMA protocol implemented directly in hardware for performance and a modular packaging scheme. NUMAflex gets its name from the flexibility it has to scale independently in the three dimensions of processor count, memory capacity, and I/O capacity.

The key to the NUMAflex design of the Altix 3000 system is a controller ASIC, referred to as the SHUB, that interfaces to the Itanium 2 front-side bus, to the memory DIMMs, I/O subsystem, and other NUMAflex components in the system. Altix 3000 is built from a number of component modules, or bricks, most of which are shared with Origin 3000. The C-brick, compute brick, is the module that customizes the system to a given processor architecture. The Altix C-brick consists of four processors connected to two SHUBs and up to 32 Gbytes of memory implemented on two equal “node” boards in a 3U brick. Figure 1 shows a diagram of the Altix 3000 C-brick schematic.

The remaining components of the system are:
The R-brick, an eight-port NUMAlink 3 router brick, which architects use to build the interconnect fabric between the C-bricks
The M-bricks, memory bricks, for independent memory scaling on the same embedded interconnect fabric
The IX-brick, the base I/O brick, and the PX-brick, a PCI-X expansion brick, which attach to the C-brick via the I/O channel
The D-brick2, a second-generation JBOD brick
SGI supplies a variety of networking, Fibre Channel SAN, RAID, and offline storage products to complete the Altix 3000 offering.

Open Figure 1

Cache coherency
The cache-coherency protocol on the Altix 3000 family is implemented in the SHUB ASIC, which interfaces to both the snooping operations of the Itanium 2 processor and the directory-based scheme used across the NUMAlink interconnect fabric. If the contents of a neighboring cache can satisfied a processor’s request, data will flow directly from one processor cache to the other processor without the extra latency of sending the request to memory. The directory-based cache-coherence used in Altix requires that the system inform only the processors currently playing an active role in the use of a given cache line about an operation to that cache line. This operation reduces the amount of information that is needed to flow around the system to maintain cache coherence, resulting in lower system overhead, reduced latency, and higher delivered bandwidth for actual data operations.

Interconnection network
Altix 3000 makes use of a new advance in NUMAflex technology – the NUMAlink 4 communications channel. Developers have employed prior generations of NUMAlink in SGI scalable systems. NUMAlink 4 provides double the bandwidth of NUMAlink 3 while maintaining compatibility with NUMAlink 3 physical connections. NUMAlink 4 is able to achieve this performance boost by employing advanced bidirectional signaling technology.

Engineers configured the NUMAflex network for Altix in a fat-tree topology. Figure 2 shows this topology for a 512-processor configuration. The circles in the figure represent R-bricks, the lines represent NUMAlink cables, and the 128 small squares across the center of the diagram represent C-bricks.

The fat-tree topology enables the system performance to scale well by providing a linear increase in bisection bandwidth as the systems increase in size. Altix 3000 also provides dual-plane or parallel networks for increased bisection bandwidth. Designers can make this dual-plane configuration possible by providing two NUMAlink ports on the Altix C-brick. Because designers have initially deployed Altix using the NUMAlink 3 router brick, the system will be able to double the bisection bandwidth when the NUMAlink 4 router brick becomes available, allowing the systems’ capabilities to grow along with the demands of new generations of Itanium 2 family microprocessors.

Open Figure 2

Table 1 lists the main memory characteristics of Altix 3000. The two numbers in the bandwidth-per-processor column correspond to NUMAlink 3 and NUMAlink 4. The two numbers in the maximum local memory column correspond to using 512-Mbyte and 1-Gbyte DIMMs. Because designers can add memory DIMMs to the system using M-bricks, they can scale the memory independent of processors. Hence, it is entirely possible to build a system with 16 processors and 4 Tbytes of shared cache-coherent memory.

Open Table 1

Reliability, availability, and service ability (RAS)
SGI designed the Altix 3000 family to provide a robust operating environment. The design protects data flowing around the system using a number of techniques.

An error-correcting code that can correct all single-bit errors, detect multiple-bit errors, and provide chip-kill error detection protects the memory.

The NUMAlink channels protect the messages flowing across the channels with a CRC protection code. If the system detects a CRC error at the receiving end of a NUMAlink channel, it resends the message, enabling the system to provide reliable communications. The dual-plane NUMAlink interconnect fabric also provides enhanced availability since the system design allows it to remain fully operational if one of the planes fails.

The system can run multiple nodes of the Linux kernel, so even if one node suffers a fatal error, other nodes may continue operating while the system repairs or reboots the failed node. The Altix 3000 packaging provides N+1 hot-swap fans and N+1 redundant power supplies on each of the C-bricks, R-bricks, and I/O bricks in the system.

Linux superclusters
SGI designers have scaled the standard Linux operating system up to the new peak of 64 processors within a single system image on the Altix 3000 family. In a traditional cluster, designers must provide each host with the maximum memory that any process may ever need. In addition, there is also the need for enough memory to run a copy of the operating system on each host. If a process needs more memory than a single host can provide, then an engineer must rework the code to spread that load across multiple hosts, if possible.

With a large host size, a larger pool of memory is available to each individual process running on that host. For example, a single 64-processor Linux kernel system will have up to 4 Tbytes of memory available for a single process to use. This gives application developers an extraordinarily large sandbox to work in, so they can concentrate on the demands of their applications without worrying about arbitrary node configuration limits.

The SGI NUMAflex architecture supports the capability of having multiple nodes on a single NUMAlink network that are independent systems, each running its own copy of the operating system. Firewalls, which can be raised or lowered to prevent or allow development of memory, CPU, and I/O access across the node boundary by processes on the other side, can separate the physical memory of an Altix 3000 system. SGI NUMAflex architectures also contain Block Transfer Engines (BTEs), which can operate as cache-coherent DMA engines. BTEs are used to copy data from one physical memory range to another at very high bandwidth, even across node boundaries.

Internode memory access allows users to access memory belonging to processes on the same Altix 3000 system. This memory can reside within the same node or on a separate node. The system can access memory by data copies utilizing the BTE or by directly sharing the underlying physical memory. Figure 3 depicts the software stacks that allow designers to build internode shared-memory (XPMEM) and networking (XPNET) software layers for SGI Linux.

Open Figure 3

The XP and XPC kernel modules provide a reliable and fault-tolerant internode communication channel that transfers data over the NUMAlink interconnect. XPNET utilizes the NUMAlink interconnect to provide high-speed TPC and UDP protocols for applications. The libxpmem user library and the XPMEM kernel module provide internode memory access to user applications. XPMEM allows a source process to make regions of its virtual address space accessible to processes within or across node boundaries. The source process can define a permission requirement to limit which processes can access its underlying memory. Other processes can then request access to this region of memory and can attach to it if they satisfy the permission requirement.

Once the system attaches and faults the underlying physical memory, the remote process operates on it via cache-coherent loads and stores just as the source process does. XPMEM locks shared physical pages across node boundaries in memory so the application cannot swap them. The XPMEM kernel module does this dynamically and only when a physical page is first used across node boundaries. Before that, the system does not require locking of the physical page in memory.

The SGI Message Passing Toolkit3 (MPI + SHMEM) is optimized to use XPMEM via the process-to-process interfaces outlined above. Future enhancements for XPMEM may include interfaces similar to existing System V shared-memory interfaces.

The global shared-memory capabilities of the Altix 3000 create a powerful new server and supercluster architecture for HPC applications. With a fast, extensible, globally shared, cache-coherent memory, and an array of APIs, users will be able to solve computational problems of greater mathematical complexity at finer resolution in a shorter time.

. . . . .

Michael Woodacre is chief engineer of the Server Products Division for SGI. He is responsible for future system architecture. Michael’s interests include cache-coherence protocols, microprocessor architecture, scalable system design, and verification. He recieved a BS in computer systems engineering from the University of Kent, Canterbury, UK.

SGI, also known as Silicon Graphics, Inc., specializes in high-performance computing, visualization, and storage. SGI’s vision is to provide technology that enables the most significant scientific and creative breakthroughs of the 21st century. Whether it’s sharing images to aid in brain surgery, finding oil more efficiently, studying global climate, or enabling the transition from analog to digital broadcasting, SGI is dedicated to addressing the next class of challenges for scientific, engineering, and creative users. For further information about the company and its products or services, contact:

SGI
1600 Amphitheatre Parkway
Mountain View, CA 94043
Tel: [phone]
Web site: www.sgi.com

[jumanii]

guten morgen,

hab mir gestern bei forbes die statments des CFO u. CEO von silicon angesehen das ding wird laufen nch jahre langen kohle verbrennen!

[siba]

Was willst Du uns sagen mit:
das ding wird laufen nch jahre langen kohle verbrennen

n(o)ch (J)ahre lang(en) (K)ohle verbrennen

oder
das (D)ing wird laufen n(a)ch jahrelange(m) (K)ohle verbrennen

Ich denke die zweite Variante war gemeint.
siba

p.s.
Nichts für ungut - sollte keine Kritik sein.

[jumanii]

#10

die zweite variante natürlich, danke

neue produkte, cash ausreichend, umsatz stabil, wachstum bis zu 8%

schau ma mal

[siba]

Sieht ganz so aus, als ob es heute noch mal einen Schub gibt.
siba

[lion37]

hier gehts ja langsam richtig lustig zu!!
vielen dank für die **vielseitigen**
postings
nett zu lesen
weiter so, da kommt wenigstens etwas
freude auf (bei der Kursentwicklung in euro`s jedenfalls
nicht)
nice weekend!!
bis zum 20.10.03
Quartalszahlen SGI after marekt close!!
Schaun wir mal!!

[m.a.x.]

genau schau ma mal ob ma bei 0,4 euro noch reinkommen...